JP3386031B2 - 同期遅延回路及び半導体集積回路装置 - Google Patents

同期遅延回路及び半導体集積回路装置

Info

Publication number
JP3386031B2
JP3386031B2 JP2000060101A JP2000060101A JP3386031B2 JP 3386031 B2 JP3386031 B2 JP 3386031B2 JP 2000060101 A JP2000060101 A JP 2000060101A JP 2000060101 A JP2000060101 A JP 2000060101A JP 3386031 B2 JP3386031 B2 JP 3386031B2
Authority
JP
Japan
Prior art keywords
delay
clock
circuit
delay circuit
synchronous
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP2000060101A
Other languages
English (en)
Japanese (ja)
Other versions
JP2001249732A (ja
Inventor
貴範 佐伯
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP2000060101A priority Critical patent/JP3386031B2/ja
Priority to TW090103392A priority patent/TW502146B/zh
Priority to KR10-2001-0010801A priority patent/KR100395467B1/ko
Priority to US09/799,543 priority patent/US6509775B2/en
Priority to EP01105577A priority patent/EP1139565A1/de
Priority to CNB011109769A priority patent/CN1161881C/zh
Publication of JP2001249732A publication Critical patent/JP2001249732A/ja
Application granted granted Critical
Publication of JP3386031B2 publication Critical patent/JP3386031B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03LAUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00Automatic control of frequency or phase; Synchronisation
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/133Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals using a chain of active delay devices
    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K5/00Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/13Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals
    • H03K5/135Arrangements having a single output and transforming input signals into pulses delivered at desired time intervals by the use of time reference signals, e.g. clock signals

Landscapes

  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Pulse Circuits (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Dram (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
JP2000060101A 2000-03-06 2000-03-06 同期遅延回路及び半導体集積回路装置 Expired - Fee Related JP3386031B2 (ja)

Priority Applications (6)

Application Number Priority Date Filing Date Title
JP2000060101A JP3386031B2 (ja) 2000-03-06 2000-03-06 同期遅延回路及び半導体集積回路装置
TW090103392A TW502146B (en) 2000-03-06 2001-02-15 Synchronous delay circuit and semiconductor integrated circuit apparatus
KR10-2001-0010801A KR100395467B1 (ko) 2000-03-06 2001-03-02 동기 지연회로 및 반도체 집적회로 장치
US09/799,543 US6509775B2 (en) 2000-03-06 2001-03-05 Synchronous delay circuit and semiconductor integrated circuit apparatus
EP01105577A EP1139565A1 (de) 2000-03-06 2001-03-06 Synchrone Verzögerungsschaltung
CNB011109769A CN1161881C (zh) 2000-03-06 2001-03-06 同步延迟电路以及半导体集成电路装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2000060101A JP3386031B2 (ja) 2000-03-06 2000-03-06 同期遅延回路及び半導体集積回路装置

Publications (2)

Publication Number Publication Date
JP2001249732A JP2001249732A (ja) 2001-09-14
JP3386031B2 true JP3386031B2 (ja) 2003-03-10

Family

ID=18580463

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2000060101A Expired - Fee Related JP3386031B2 (ja) 2000-03-06 2000-03-06 同期遅延回路及び半導体集積回路装置

Country Status (6)

Country Link
US (1) US6509775B2 (de)
EP (1) EP1139565A1 (de)
JP (1) JP3386031B2 (de)
KR (1) KR100395467B1 (de)
CN (1) CN1161881C (de)
TW (1) TW502146B (de)

Families Citing this family (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4609808B2 (ja) * 2001-09-19 2011-01-12 エルピーダメモリ株式会社 半導体集積回路装置及び遅延ロックループ装置
JP3685786B2 (ja) * 2003-02-18 2005-08-24 誠 小川 半導体回路
KR100546320B1 (ko) * 2003-02-27 2006-01-26 삼성전자주식회사 클럭 트리 합성 장치 및 방법
KR100558554B1 (ko) * 2004-01-07 2006-03-10 삼성전자주식회사 내부 클럭 발생 장치
US7276946B2 (en) * 2004-07-16 2007-10-02 Micron Technology, Inc. Measure-controlled delay circuits with reduced phase error
US7216322B2 (en) * 2004-09-07 2007-05-08 Chang Gung University Clock tree synthesis for low power consumption and low clock skew
US7091764B2 (en) * 2004-11-05 2006-08-15 Infineon Technologies Ag Duty distortion detector
KR100913330B1 (ko) * 2007-12-27 2009-08-20 주식회사 동부하이텍 메모리 소자의 테스트 장치
US7642827B2 (en) * 2008-05-28 2010-01-05 Micron Technology, Inc. Apparatus and method for multi-phase clock generation
US7719334B2 (en) * 2008-05-28 2010-05-18 Micron Technology, Inc. Apparatus and method for multi-phase clock generation
CN102347057A (zh) * 2011-08-09 2012-02-08 北京时代全芯科技有限公司 用于数据路径的时钟树结构及具有其的存储器
US9520865B2 (en) * 2014-09-04 2016-12-13 Qualcomm Incorporated Delay circuits and related systems and methods
CN106960087B (zh) * 2017-03-13 2020-05-19 上海华力微电子有限公司 一种时钟分布网络结构及其生成方法

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3338744B2 (ja) 1994-12-20 2002-10-28 日本電気株式会社 遅延回路装置
JPH1013395A (ja) * 1996-06-25 1998-01-16 Toshiba Corp 位相同期回路
TW350166B (en) * 1996-09-13 1999-01-11 Nippon Elecric Co Multiple synchroneous delay circuit
JPH10150350A (ja) * 1996-11-18 1998-06-02 Toshiba Corp 位相同期回路及びその位相回路を用いた記憶装置
US6075395A (en) * 1997-05-30 2000-06-13 Nec Corporation Synchronous delay circuit
JP3072726B2 (ja) * 1997-05-30 2000-08-07 日本電気株式会社 同期遅延回路
JP3039466B2 (ja) * 1997-08-12 2000-05-08 日本電気株式会社 クロックリカバリ回路
JP3019814B2 (ja) * 1997-09-18 2000-03-13 日本電気株式会社 クロックリカバリ回路
JP3434682B2 (ja) * 1997-10-03 2003-08-11 Necエレクトロニクス株式会社 同期遅延回路
JPH11112308A (ja) * 1997-10-06 1999-04-23 Nec Corp 同期遅延回路装置
JP3052925B2 (ja) * 1998-02-27 2000-06-19 日本電気株式会社 クロック制御方法および回路
JP3579277B2 (ja) * 1998-12-28 2004-10-20 株式会社東芝 クロック同期遅延制御回路
KR100326809B1 (ko) * 1999-04-09 2002-03-04 박종섭 딜레이 동기회로

Also Published As

Publication number Publication date
CN1315782A (zh) 2001-10-03
US20010020859A1 (en) 2001-09-13
EP1139565A1 (de) 2001-10-04
JP2001249732A (ja) 2001-09-14
KR100395467B1 (ko) 2003-08-25
CN1161881C (zh) 2004-08-11
US6509775B2 (en) 2003-01-21
TW502146B (en) 2002-09-11
KR20010087275A (ko) 2001-09-15

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