JP2702182B2 - 半導体装置およびその製造方法 - Google Patents

半導体装置およびその製造方法

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Publication number
JP2702182B2
JP2702182B2 JP63272250A JP27225088A JP2702182B2 JP 2702182 B2 JP2702182 B2 JP 2702182B2 JP 63272250 A JP63272250 A JP 63272250A JP 27225088 A JP27225088 A JP 27225088A JP 2702182 B2 JP2702182 B2 JP 2702182B2
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JP
Japan
Prior art keywords
semiconductor element
metal wire
lead
semiconductor device
resin
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
JP63272250A
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English (en)
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JPH02119151A (ja
Inventor
直人 木村
Original Assignee
九州日本電気株式会社
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Application filed by 九州日本電気株式会社 filed Critical 九州日本電気株式会社
Priority to JP63272250A priority Critical patent/JP2702182B2/ja
Publication of JPH02119151A publication Critical patent/JPH02119151A/ja
Application granted granted Critical
Publication of JP2702182B2 publication Critical patent/JP2702182B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/74Apparatus for manufacturing arrangements for connecting or disconnecting semiconductor or solid-state bodies
    • H01L24/78Apparatus for connecting with wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4807Shape of bonding interfaces, e.g. interlocking features
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
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    • H01L2224/78Apparatus for connecting with wire connectors
    • HELECTRICITY
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    • H01L2224/7855Mechanical means, e.g. for severing, pressing, stamping
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    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/8538Bonding interfaces outside the semiconductor or solid-state body
    • H01L2224/85385Shape, e.g. interlocking features
    • HELECTRICITY
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    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/85Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • H01L2224/85909Post-treatment of the connector or wire bonding area
    • H01L2224/8593Reshaping, e.g. for severing the wire, modifying the wedge or ball or the loop shape
    • H01L2224/85947Reshaping, e.g. for severing the wire, modifying the wedge or ball or the loop shape by mechanical means, e.g. "pull-and-cut", pressing, stamping
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
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    • H01L2224/91Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
    • H01L2224/92Specific sequence of method steps
    • H01L2224/922Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
    • H01L2224/9222Sequential connecting processes
    • H01L2224/92242Sequential connecting processes the first connecting process involving a layer connector
    • H01L2224/92247Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
    • HELECTRICITY
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    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
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    • H01L2924/151Die mounting substrate
    • H01L2924/1515Shape
    • H01L2924/15153Shape the die mounting substrate comprising a recess for hosting the device
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    • H01L2924/15165Monolayer substrate
    • HELECTRICITY
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    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/161Cap
    • H01L2924/1615Shape
    • H01L2924/16195Flat cap [not enclosing an internal cavity]

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体装置に関する。
〔従来の技術〕 従来のセラミック・パッケージ型半導体装置の構造に
ついて図面を用いて説明する。
第5図は従来の半導体装置の一例の断面図である。
セラミック・パッケージの容器1に半導体素子2を接
着剤4で固着する。半導体素子2の電極と容器1のリー
ド12とは金属線5で接続される。キャップ13を容器1に
接着剤14で固着して保護する。
上述の従来の半導体装置では、半導体素子2の電極と
外部端子となるリード12とは金属線4で接続されてい
る。
〔発明が解決しようとする課題〕
上述した従来の半導体装置は、半導体素子の電極から
金属線にてリードと連結するという二段連結方法を用い
ているために、パッケージの外部寸法が大きくなるとい
う欠点があった。
〔課題を解決するための手段〕
本発明の半導体装置の構成は、半導体素子が樹脂封止
され、この半導体素子の電極部に接合された金属線が前
記電極部側のパッケージ表面にまで連なり外部端子とし
て形成された構造を有することを特徴とする。
また本発明の半導体装置の製造方法は、半導体素子の
電極部にリードとなる各金属線を接続し、これら金属線
の他端を前記電極部側の上方に連ねて配列させたのち前
記金属線をその先端部を除いて前記半導体素子と共に樹
脂封止し、前記金属線の先端部を外部リードとしたこと
を特徴とする。
〔実施例〕
次に、本発明の実施例について図面を参照して説明す
る。
第1図(a),(b)は本発明の第1の実施例の斜視
図及びA−A′線断面図である。
半導体素子2は接着剤4にてパッケージの容器1に接
着される。半導体素子2上の電極3には金属線5が接合
される。半導体素子2は容器1内で樹脂6にて封止され
る。
次に、この実施例の製造方法について説明する。
第2図は本発明の実施例の製造に使用するリードフレ
ームの一部断面斜視図である。
リードフレーム7は容器1を吊りリード9で支持して
いる。吊りリード9には後で切断しやすいようにスリッ
ト10が設けられている。リードフレーム7の表面の一部
には金属めっき層8が設けられている。容器1は絶縁材
料で作られる。
第3図(a)〜(e)は本発明の実施例の製造方法を
説明するための工程順に示した断面図である。
まず、第3図(a)に示すように、パッケージの容器
1の底面に接着剤4を塗布し、半導体素子2を挿入して
固着する。
次に、第3図(b)に示すように、半導体素子2の電
極3に直径100μmφ程度の金属線5を接合し、しかる
後リードフレームの金属めっき層8へ連絡する。次に樹
脂6を容器1へ注入し封止する。
次に、第3図(c)に示すように、リードフレーム7
を押し下げ金属線5を所定の形状に成形する。同時に吊
りリード9を容器1の付け根のスリット10の所で折損分
離を行なう。
次に、第3図(d)に示すように、切断刃11にて金属
線5を切断する。
これにより、第3図(e)に示すような完成品を得
る。
第4図は本発明の第2の実施例の斜視断面図である。
通常の樹脂封止型半導体装置用のリードフレームのア
イランド16に半導体素子2を接着剤4で固着する。金属
線5で半導体素子2の電極とリードフレームのリードと
を結線するが、金属線5は後工程での樹脂封止後に樹脂
6から露出するような形に成形しておく。しかる後、樹
脂6で封止し、金属線5を樹脂6の側壁に沿って切断す
る。その加工法は第3図(b)〜(d)に示したのと同
様である。
〔発明の効果〕
以上説明したように本発明は、半導体素子の電極に接
続する金属線を外部リードと兼用するようにしたので、
パッケージ外形寸法を小さくできると共に、外部リード
の加工工数を不要とし、製造コストを低減できるという
効果がある。
【図面の簡単な説明】
第1図(a),(b)は本発明の第1の実施例の斜視図
及びA−A′線断面図、第2図は実施例の製造に使用す
るリードフレームの一部断面斜視図、第3図(a)〜
(e)は本発明の実施例の製造方法を説明するための工
程順に示した断面図、第4図は本発明の第2の実施例の
断面図、第5図は従来の半導体装置の一例の断面図であ
る。 1……容器、2……半導体素子、3……電極、4……接
着剤、5……金属線、6……樹脂、7……リードフレー
ム、8……金属めっき層、9……吊りリード、10……ス
リット、11……切断刃、12……リード、13……キャッ
プ、14……接着剤、16……アイランド。

Claims (2)

    (57)【特許請求の範囲】
  1. 【請求項1】半導体素子が樹脂封止され、この半導体素
    子の電極部に接合された金属線が前記電極部側のパッケ
    ージ表面にまで連なり外部端子として形成された構造を
    有することを特徴とする半導体装置。
  2. 【請求項2】半導体素子の電極部にリードとなる各金属
    線を接続し、これら金属線の他端を前記電極部側の上方
    に連ねて配列させたのち前記金属線をその先端部を除い
    て前記半導体素子と共に樹脂封止し、前記金属線の先端
    部を外部リードとしたことを特徴とする半導体装置の製
    造方法。
JP63272250A 1988-10-27 1988-10-27 半導体装置およびその製造方法 Expired - Fee Related JP2702182B2 (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP63272250A JP2702182B2 (ja) 1988-10-27 1988-10-27 半導体装置およびその製造方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63272250A JP2702182B2 (ja) 1988-10-27 1988-10-27 半導体装置およびその製造方法

Publications (2)

Publication Number Publication Date
JPH02119151A JPH02119151A (ja) 1990-05-07
JP2702182B2 true JP2702182B2 (ja) 1998-01-21

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Application Number Title Priority Date Filing Date
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JP (1) JP2702182B2 (ja)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2752803B2 (ja) * 1991-05-17 1998-05-18 九州日本電気株式会社 半導体装置の製造方法

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59208756A (ja) * 1983-05-12 1984-11-27 Sony Corp 半導体装置のパツケ−ジの製造方法

Also Published As

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