JP2547633B2 - 半導体記憶装置 - Google Patents
半導体記憶装置Info
- Publication number
- JP2547633B2 JP2547633B2 JP1116527A JP11652789A JP2547633B2 JP 2547633 B2 JP2547633 B2 JP 2547633B2 JP 1116527 A JP1116527 A JP 1116527A JP 11652789 A JP11652789 A JP 11652789A JP 2547633 B2 JP2547633 B2 JP 2547633B2
- Authority
- JP
- Japan
- Prior art keywords
- spare
- row
- signal
- selection signal
- memory cell
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
Links
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
- G11C29/80—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout
- G11C29/806—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout by reducing size of decoders
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
- G11C29/70—Masking faults in memories by using spares or by reconfiguring
- G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
- G11C29/781—Masking faults in memories by using spares or by reconfiguring using programmable devices combined in a redundant decoder
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C8/00—Arrangements for selecting an address in a digital store
- G11C8/10—Decoders
Landscapes
- For Increasing The Reliability Of Semiconductor Memories (AREA)
- Dram (AREA)
- Static Random-Access Memory (AREA)
- Design And Manufacture Of Integrated Circuits (AREA)
- Semiconductor Memories (AREA)
- Techniques For Improving Reliability Of Storages (AREA)
Priority Applications (7)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1116527A JP2547633B2 (ja) | 1989-05-09 | 1989-05-09 | 半導体記憶装置 |
| KR1019900006247A KR940000902B1 (ko) | 1989-05-09 | 1990-05-03 | 반도체 기억장치 |
| DE4014723A DE4014723A1 (de) | 1989-05-09 | 1990-05-08 | Halbleiterspeichereinrichtung mit redundanzschaltkreis |
| US07/958,466 US5289417A (en) | 1989-05-09 | 1992-10-08 | Semiconductor memory device with redundancy circuit |
| US08/180,166 US5504713A (en) | 1989-05-09 | 1994-01-11 | Semiconductor memory device with redundancy circuit |
| US08/882,758 US5982678A (en) | 1989-05-09 | 1997-06-26 | Semiconductor memory device with redundancy circuit |
| US09/334,917 US6075732A (en) | 1989-05-09 | 1999-06-17 | Semiconductor memory device with redundancy circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1116527A JP2547633B2 (ja) | 1989-05-09 | 1989-05-09 | 半導体記憶装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPH02294999A JPH02294999A (ja) | 1990-12-05 |
| JP2547633B2 true JP2547633B2 (ja) | 1996-10-23 |
Family
ID=14689337
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1116527A Expired - Lifetime JP2547633B2 (ja) | 1989-05-09 | 1989-05-09 | 半導体記憶装置 |
Country Status (4)
| Country | Link |
|---|---|
| US (2) | US5982678A (enExample) |
| JP (1) | JP2547633B2 (enExample) |
| KR (1) | KR940000902B1 (enExample) |
| DE (1) | DE4014723A1 (enExample) |
Families Citing this family (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5452251A (en) | 1992-12-03 | 1995-09-19 | Fujitsu Limited | Semiconductor memory device for selecting and deselecting blocks of word lines |
| KR950004623B1 (ko) * | 1992-12-07 | 1995-05-03 | 삼성전자주식회사 | 리던던시 효율이 향상되는 반도체 메모리 장치 |
| JP3351595B2 (ja) * | 1993-12-22 | 2002-11-25 | 株式会社日立製作所 | 半導体メモリ装置 |
| US6072735A (en) * | 1998-06-22 | 2000-06-06 | Lucent Technologies, Inc. | Built-in redundancy architecture for computer memories |
| US6198675B1 (en) | 1998-12-23 | 2001-03-06 | Cray Inc. | RAM configurable redundancy |
| JP2001143494A (ja) * | 1999-03-19 | 2001-05-25 | Toshiba Corp | 半導体記憶装置 |
| JP2000285694A (ja) * | 1999-03-30 | 2000-10-13 | Mitsubishi Electric Corp | 半導体記憶装置および半導体記憶装置を搭載する半導体集積回路装置 |
| US7656727B2 (en) * | 2007-04-25 | 2010-02-02 | Hewlett-Packard Development Company, L.P. | Semiconductor memory device and system providing spare memory locations |
Family Cites Families (21)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5928560Y2 (ja) * | 1979-11-13 | 1984-08-17 | 富士通株式会社 | 冗長ビットを有する記憶装置 |
| DE3028813C2 (de) * | 1980-07-30 | 1983-09-08 | Christensen, Inc., 84115 Salt Lake City, Utah | Verfahren und Vorrichtung zur Fernübertragung von Informationen |
| US4389715A (en) * | 1980-10-06 | 1983-06-21 | Inmos Corporation | Redundancy scheme for a dynamic RAM |
| US4459685A (en) * | 1982-03-03 | 1984-07-10 | Inmos Corporation | Redundancy system for high speed, wide-word semiconductor memories |
| JPS59151398A (ja) * | 1983-02-17 | 1984-08-29 | Mitsubishi Electric Corp | 半導体記憶装置 |
| US4639897A (en) * | 1983-08-31 | 1987-01-27 | Rca Corporation | Priority encoded spare element decoder |
| JPH0666120B2 (ja) * | 1983-11-09 | 1994-08-24 | 株式会社東芝 | 半導体記憶装置の冗長部 |
| JPS6237479A (ja) * | 1985-08-12 | 1987-02-18 | 日産自動車株式会社 | 無線式施解錠制御装置 |
| JPS62222500A (ja) * | 1986-03-20 | 1987-09-30 | Fujitsu Ltd | 半導体記憶装置 |
| JPS62293598A (ja) * | 1986-06-12 | 1987-12-21 | Toshiba Corp | 半導体記憶装置 |
| JPH0810553B2 (ja) * | 1986-06-13 | 1996-01-31 | 松下電器産業株式会社 | 記憶回路 |
| JPS6355797A (ja) * | 1986-08-27 | 1988-03-10 | Fujitsu Ltd | メモリ |
| US4837747A (en) * | 1986-11-29 | 1989-06-06 | Mitsubishi Denki Kabushiki Kaisha | Redundary circuit with a spare main decoder responsive to an address of a defective cell in a selected cell block |
| JPH0748315B2 (ja) * | 1986-12-22 | 1995-05-24 | 三菱電機株式会社 | 半導体記憶装置 |
| JP2629697B2 (ja) * | 1987-03-27 | 1997-07-09 | 日本電気株式会社 | 半導体記憶装置 |
| JP2590897B2 (ja) * | 1987-07-20 | 1997-03-12 | 日本電気株式会社 | 半導体メモリ |
| US4807191A (en) * | 1988-01-04 | 1989-02-21 | Motorola, Inc. | Redundancy for a block-architecture memory |
| US4885720A (en) * | 1988-04-01 | 1989-12-05 | International Business Machines Corporation | Memory device and method implementing wordline redundancy without an access time penalty |
| JP2617779B2 (ja) * | 1988-08-31 | 1997-06-04 | 三菱電機株式会社 | 半導体メモリ装置 |
| JP2582439B2 (ja) * | 1989-07-11 | 1997-02-19 | 富士通株式会社 | 書き込み可能な半導体記憶装置 |
| KR950000504B1 (ko) * | 1992-01-31 | 1995-01-24 | 삼성전자 주식회사 | 복수개의 로우 어드레스 스트로브 신호를 가지는 반도체 메모리 장치 |
-
1989
- 1989-05-09 JP JP1116527A patent/JP2547633B2/ja not_active Expired - Lifetime
-
1990
- 1990-05-03 KR KR1019900006247A patent/KR940000902B1/ko not_active Expired - Lifetime
- 1990-05-08 DE DE4014723A patent/DE4014723A1/de active Granted
-
1997
- 1997-06-26 US US08/882,758 patent/US5982678A/en not_active Expired - Fee Related
-
1999
- 1999-06-17 US US09/334,917 patent/US6075732A/en not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| DE4014723A1 (de) | 1990-11-15 |
| US5982678A (en) | 1999-11-09 |
| KR940000902B1 (ko) | 1994-02-04 |
| JPH02294999A (ja) | 1990-12-05 |
| KR900019047A (ko) | 1990-12-22 |
| US6075732A (en) | 2000-06-13 |
| DE4014723C2 (enExample) | 1991-10-31 |
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