JP2021090012A - 銅ピラーバンプ、半導体チップ、半導体装置 - Google Patents

銅ピラーバンプ、半導体チップ、半導体装置 Download PDF

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Publication number
JP2021090012A
JP2021090012A JP2019220606A JP2019220606A JP2021090012A JP 2021090012 A JP2021090012 A JP 2021090012A JP 2019220606 A JP2019220606 A JP 2019220606A JP 2019220606 A JP2019220606 A JP 2019220606A JP 2021090012 A JP2021090012 A JP 2021090012A
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Japan
Prior art keywords
layer
copper
metal layer
pillar bump
solder
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Pending
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JP2019220606A
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Japanese (ja)
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JP2021090012A5 (https=
Inventor
研吾 山本
Kengo Yamamoto
研吾 山本
伊藤　大介
Daisuke Ito
大介 伊藤
光晃 大久保
Mitsuaki Okubo
光晃 大久保
健二 内田
Kenji Uchida
健二 内田
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Shinko Electric Industries Co Ltd
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Shinko Electric Industries Co Ltd
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Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP2019220606A priority Critical patent/JP2021090012A/ja
Priority to US17/090,082 priority patent/US11380642B2/en
Priority to CN202011243111.7A priority patent/CN112928087B/zh
Publication of JP2021090012A publication Critical patent/JP2021090012A/ja
Publication of JP2021090012A5 publication Critical patent/JP2021090012A5/ja
Pending legal-status Critical Current

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    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H—ELECTRICITY
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    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/40—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes
    • H10W20/41—Interconnections external to wafers or substrates, e.g. back-end-of-line [BEOL] metallisations or vias connecting to gate electrodes characterised by their conductive parts
    • H10W20/425—Barrier, adhesion or liner layers
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    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68—Shapes or dispositions thereof
    • H10W70/682—Shapes or dispositions thereof comprising holes having chips therein
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    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
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    • H10W72/00—Interconnections or connectors in packages
    • H10W72/01—Manufacture or treatment
    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H10W72/01231—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using blanket deposition
    • H10W72/01233—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using blanket deposition in liquid form, e.g. spin coating, spray coating or immersion coating
    • H10W72/01235—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps using blanket deposition in liquid form, e.g. spin coating, spray coating or immersion coating by plating, e.g. electroless plating or electroplating
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    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H10W72/01251—Changing the shapes of bumps
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    • H10W72/012—Manufacture or treatment of bump connectors, dummy bumps or thermal bumps
    • H10W72/01251—Changing the shapes of bumps
    • H10W72/01255—Changing the shapes of bumps by using masks
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    • H10W72/01251—Changing the shapes of bumps
    • H10W72/01257—Changing the shapes of bumps by reflowing
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    • H10W72/01931—Manufacture or treatment of bond pads using blanket deposition
    • H10W72/01933—Manufacture or treatment of bond pads using blanket deposition in liquid form, e.g. spin coating, spray coating or immersion coating
    • H10W72/01935—Manufacture or treatment of bond pads using blanket deposition in liquid form, e.g. spin coating, spray coating or immersion coating by plating, e.g. electroless plating or electroplating
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    • H10W72/01931—Manufacture or treatment of bond pads using blanket deposition
    • H10W72/01938—Manufacture or treatment of bond pads using blanket deposition in gaseous form, e.g. by CVD or PVD
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    • H10W72/01951—Changing the shapes of bond pads
    • H10W72/01953—Changing the shapes of bond pads by etching
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    • H10W72/071—Connecting or disconnecting
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    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/072—Connecting or disconnecting of bump connectors
    • H10W72/07231—Techniques
    • H10W72/07236—Soldering or alloying
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    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
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    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
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    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H10W72/07351—Connecting or disconnecting of die-attach connectors characterised by changes in properties of the die-attach connectors during connecting
    • H10W72/07353—Connecting or disconnecting of die-attach connectors characterised by changes in properties of the die-attach connectors during connecting changes in shapes
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    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H10W72/07351—Connecting or disconnecting of die-attach connectors characterised by changes in properties of the die-attach connectors during connecting
    • H10W72/07354—Connecting or disconnecting of die-attach connectors characterised by changes in properties of the die-attach connectors during connecting changes in dispositions
    • H—ELECTRICITY
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    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/221—Structures or relative sizes
    • H—ELECTRICITY
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    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/221—Structures or relative sizes
    • H10W72/222—Multilayered bumps, e.g. a coating on top and side surfaces of a bump core
    • H—ELECTRICITY
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    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/231—Shapes
    • H10W72/234—Cross-sectional shape, i.e. in side view
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    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/241—Dispositions, e.g. layouts
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    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/251—Materials
    • H10W72/252—Materials comprising solid metals or solid metalloids, e.g. PbSn, Ag or Cu
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    • H10W72/00—Interconnections or connectors in packages
    • H10W72/20—Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps
    • H10W72/281—Auxiliary members
    • H10W72/287—Flow barriers
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    • H10W72/29—Bond pads specially adapted therefor
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    • H10W72/30—Die-attach connectors
    • H10W72/321—Structures or relative sizes of die-attach connectors
    • H10W72/325—Die-attach connectors having a filler embedded in a matrix
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    • H10W72/331—Shapes of die-attach connectors
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    • H10W72/341—Dispositions of die-attach connectors, e.g. layouts
    • H10W72/344—Dispositions of die-attach connectors, e.g. layouts relative to underlying supporting features, e.g. bond pads, RDLs or vias
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    • H10W72/351—Materials of die-attach connectors
    • H10W72/353—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics
    • H10W72/354—Materials of die-attach connectors not comprising solid metals or solid metalloids, e.g. ceramics comprising polymers
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    • H10W72/00—Interconnections or connectors in packages
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    • H10W72/921—Structures or relative sizes of bond pads
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    • H10W74/15—Encapsulations, e.g. protective coatings characterised by their shape or disposition on active surfaces of flip-chip devices, e.g. underfills
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    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
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    • H10W90/00—Package configurations
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    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL

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JP2019220606A 2019-12-05 2019-12-05 銅ピラーバンプ、半導体チップ、半導体装置 Pending JP2021090012A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2019220606A JP2021090012A (ja) 2019-12-05 2019-12-05 銅ピラーバンプ、半導体チップ、半導体装置
US17/090,082 US11380642B2 (en) 2019-12-05 2020-11-05 Copper pillar bump having annular protrusion
CN202011243111.7A CN112928087B (zh) 2019-12-05 2020-11-09 柱状铜凸点、半导体芯片及半导体装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2019220606A JP2021090012A (ja) 2019-12-05 2019-12-05 銅ピラーバンプ、半導体チップ、半導体装置

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JP2021090012A true JP2021090012A (ja) 2021-06-10
JP2021090012A5 JP2021090012A5 (https=) 2022-08-12

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US (1) US11380642B2 (https=)
JP (1) JP2021090012A (https=)
CN (1) CN112928087B (https=)

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US10943880B2 (en) * 2019-05-16 2021-03-09 Advanced Micro Devices, Inc. Semiconductor chip with reduced pitch conductive pillars
US11694982B2 (en) * 2021-02-25 2023-07-04 Qualcomm Incorporated Sidewall wetting barrier for conductive pillars
US20240282726A1 (en) * 2023-02-17 2024-08-22 Nxp Usa, Inc. Semiconductor device with pad contact feature and method therefor
CN120033169A (zh) * 2025-02-18 2025-05-23 气派科技股份有限公司 一种高可靠性凸块结构及制备方法

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US20190189577A1 (en) * 2017-12-14 2019-06-20 Taiwan Semiconductor Manufacturing Co., Ltd. Package structure and method for forming the same
WO2019167218A1 (ja) * 2018-03-01 2019-09-06 新電元工業株式会社 半導体装置

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JP2006295109A (ja) 2005-03-14 2006-10-26 Citizen Watch Co Ltd 半導体装置とその製造方法
US8293587B2 (en) 2007-10-11 2012-10-23 International Business Machines Corporation Multilayer pillar for reduced stress interconnect and method of making same
KR101159723B1 (ko) * 2010-10-04 2012-06-28 에스케이하이닉스 주식회사 반도체 소자의 콘택 및 그 형성 방법
US9663868B2 (en) * 2011-12-28 2017-05-30 Mitsui Mining & Smelting Co., Ltd. Electro-deposited copper-alloy foil and electro-deposited copper-alloy foil provided with carrier foil
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JP6456232B2 (ja) * 2015-04-30 2019-01-23 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
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