JP2020087938A - 多層基板 - Google Patents
多層基板 Download PDFInfo
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- JP2020087938A JP2020087938A JP2018214108A JP2018214108A JP2020087938A JP 2020087938 A JP2020087938 A JP 2020087938A JP 2018214108 A JP2018214108 A JP 2018214108A JP 2018214108 A JP2018214108 A JP 2018214108A JP 2020087938 A JP2020087938 A JP 2020087938A
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- 239000000463 material Substances 0.000 claims abstract description 75
- 239000011347 resin Substances 0.000 claims abstract description 46
- 229920005989 resin Polymers 0.000 claims abstract description 46
- 239000000758 substrate Substances 0.000 claims description 60
- 239000011521 glass Substances 0.000 claims description 52
- 238000004519 manufacturing process Methods 0.000 abstract description 19
- 238000005336 cracking Methods 0.000 abstract description 3
- 239000010410 layer Substances 0.000 description 160
- 230000035882 stress Effects 0.000 description 34
- 238000005452 bending Methods 0.000 description 17
- 239000004065 semiconductor Substances 0.000 description 10
- 239000010949 copper Substances 0.000 description 8
- 238000000034 method Methods 0.000 description 7
- 238000009826 distribution Methods 0.000 description 6
- 238000007747 plating Methods 0.000 description 6
- 230000015572 biosynthetic process Effects 0.000 description 4
- 238000005520 cutting process Methods 0.000 description 4
- 238000010586 diagram Methods 0.000 description 4
- PXHVJJICTQNCMI-UHFFFAOYSA-N nickel Substances [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 4
- 238000004088 simulation Methods 0.000 description 4
- 239000004593 Epoxy Substances 0.000 description 3
- 239000010936 titanium Substances 0.000 description 3
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 238000004806 packaging method and process Methods 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 229910052709 silver Inorganic materials 0.000 description 2
- 239000004332 silver Substances 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- JMASRVWKEDWRBT-UHFFFAOYSA-N Gallium nitride Chemical compound [Ga]#N JMASRVWKEDWRBT-UHFFFAOYSA-N 0.000 description 1
- 229920000106 Liquid crystal polymer Polymers 0.000 description 1
- 239000004977 Liquid-crystal polymers (LCPs) Substances 0.000 description 1
- 239000004642 Polyimide Substances 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- RTAQQCXQSZGOHL-UHFFFAOYSA-N Titanium Chemical compound [Ti] RTAQQCXQSZGOHL-UHFFFAOYSA-N 0.000 description 1
- 229910045601 alloy Inorganic materials 0.000 description 1
- 239000000956 alloy Substances 0.000 description 1
- 238000013473 artificial intelligence Methods 0.000 description 1
- 229910052797 bismuth Inorganic materials 0.000 description 1
- JCXGWMGPZLAOME-UHFFFAOYSA-N bismuth atom Chemical compound [Bi] JCXGWMGPZLAOME-UHFFFAOYSA-N 0.000 description 1
- 239000000919 ceramic Substances 0.000 description 1
- 150000004696 coordination complex Chemical class 0.000 description 1
- 239000012792 core layer Substances 0.000 description 1
- 238000013135 deep learning Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 229910003460 diamond Inorganic materials 0.000 description 1
- 239000010432 diamond Substances 0.000 description 1
- 238000005553 drilling Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000007772 electroless plating Methods 0.000 description 1
- 238000009713 electroplating Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000006355 external stress Effects 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 238000007731 hot pressing Methods 0.000 description 1
- 238000009863 impact test Methods 0.000 description 1
- 238000011835 investigation Methods 0.000 description 1
- 238000010030 laminating Methods 0.000 description 1
- 229910052759 nickel Inorganic materials 0.000 description 1
- 229920001721 polyimide Polymers 0.000 description 1
- 238000007639 printing Methods 0.000 description 1
- 230000009467 reduction Effects 0.000 description 1
- 229910052594 sapphire Inorganic materials 0.000 description 1
- 239000010980 sapphire Substances 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 239000012815 thermoplastic material Substances 0.000 description 1
- 229920001187 thermosetting polymer Polymers 0.000 description 1
- 229910052719 titanium Inorganic materials 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49822—Multilayer substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
- H01L23/15—Ceramic or glass substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
- H01L23/49894—Materials of the insulating layers or coatings
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
- H05K3/425—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern
- H05K3/426—Plated through-holes or plated via connections characterised by the sequence of steps for plating the through-holes or via connections in relation to the conductive pattern initial plating of through-holes in substrates without metal
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
- H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
- H05K3/4629—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/4038—Through-connections; Vertical interconnect access [VIA] connections
- H05K3/4053—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques
- H05K3/4061—Through-connections; Vertical interconnect access [VIA] connections by thick-film techniques for via connections in inorganic insulating substrates
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Ceramic Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Inorganic Chemistry (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Laminated Bodies (AREA)
Abstract
Description
先ず、第1の実施形態について説明する。図1は、第1の実施形態に係る多層基板を示す断面図である。
次に、第2の実施形態について説明する。図8は、第2の実施形態に係る多層基板を示す断面図である。
第3の実施形態は、多層基板を含む半導体装置に関する。図10は、第3の実施形態に係る半導体装置を示す平面図である。図11は、第3の実施形態に係る半導体装置に含まれる多層基板を示す断面図である。
板厚方向に積層された複数の脆性材料板と、
隣り合う前記脆性材料板の間に設けられた樹脂層及び内部導電層と、
前記複数の脆性材料板のうち、前記板厚方向の両端に位置する脆性材料板の外面に設けられた外部導電層と、
を有し、
前記内部導電層及び前記外部導電層の合計厚さは、前記脆性材料板の合計厚さの25%以下であることを特徴とする多層基板。
(付記2)
前記内部導電層及び前記外部導電層の合計厚さは、前記脆性材料板の合計厚さの20%以下であることを特徴とする付記1に記載の多層基板。
(付記3)
前記脆性材料板の弾性率が80MPa以下であることを特徴とする付記1又は2に記載の多層基板。
(付記4)
前記脆性材料板を10以上含むことを特徴とする付記1乃至3のいずれか1項に記載の多層基板。
(付記5)
前記脆性材料板はガラス板であることを特徴とする付記1乃至4のいずれか1項に記載の多層基板。
(付記6)
前記多層基板の一部の層において、前記複数の脆性材料板と、隣り合う前記脆性材料板の間に設けられた樹脂層及び内部導電層とが、積層されていることを特徴とする付記1乃至5のいずれか1項に記載の多層基板。
101:脆性材料板
113A、213A、313A:内部導電層
113B、213B、313B:外部導電層
121、221、321:樹脂層
201、301:ガラス板
Claims (5)
- 板厚方向に積層された複数の脆性材料板と、
隣り合う前記脆性材料板の間に設けられた樹脂層及び内部導電層と、
前記複数の脆性材料板のうち、前記板厚方向の両端に位置する脆性材料板の外面に設けられた外部導電層と、
を有し、
前記内部導電層及び前記外部導電層の合計厚さは、前記脆性材料板の合計厚さの25%以下であることを特徴とする多層基板。 - 前記脆性材料板の弾性率が80MPa以下であることを特徴とする請求項1に記載の多層基板。
- 前記脆性材料板を10以上含むことを特徴とする請求項1又は2に記載の多層基板。
- 前記脆性材料板はガラス板であることを特徴とする請求項1乃至3のいずれか1項に記載の多層基板。
- 前記多層基板の一部の層において、前記複数の脆性材料板と、隣り合う前記脆性材料板の間に設けられた樹脂層及び内部導電層とが、積層されていることを特徴とする請求項1乃至4のいずれか1項に記載の多層基板。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2018214108A JP7222666B2 (ja) | 2018-11-14 | 2018-11-14 | 多層基板 |
US16/662,440 US11152291B2 (en) | 2018-11-14 | 2019-10-24 | Multilayer substrate |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2018214108A JP7222666B2 (ja) | 2018-11-14 | 2018-11-14 | 多層基板 |
Publications (3)
Publication Number | Publication Date |
---|---|
JP2020087938A true JP2020087938A (ja) | 2020-06-04 |
JP2020087938A5 JP2020087938A5 (ja) | 2021-04-30 |
JP7222666B2 JP7222666B2 (ja) | 2023-02-15 |
Family
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Family Applications (1)
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JP2018214108A Active JP7222666B2 (ja) | 2018-11-14 | 2018-11-14 | 多層基板 |
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---|---|
US (1) | US11152291B2 (ja) |
JP (1) | JP7222666B2 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2023189540A1 (ja) * | 2022-03-30 | 2023-10-05 | ソニーセミコンダクタソリューションズ株式会社 | ガラス配線基板及びその製造方法、撮像装置 |
Families Citing this family (2)
Publication number | Priority date | Publication date | Assignee | Title |
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US20230102183A1 (en) * | 2021-09-29 | 2023-03-30 | Advanced Micro Devices, Inc. | Glass core package substrates |
US20230207406A1 (en) * | 2021-12-24 | 2023-06-29 | Intel Corporation | Ultra low loss and high-density routing between cores |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6216598A (ja) * | 1985-07-15 | 1987-01-24 | 富士通株式会社 | 多層セラミツク回路基板の接続ピン形成方法 |
JPH02142198A (ja) * | 1988-11-22 | 1990-05-31 | Matsushita Electric Works Ltd | セラミック多層配線板の製造方法 |
JP2001267746A (ja) * | 2000-03-17 | 2001-09-28 | Hitachi Ltd | 多層配線基板 |
JP2015012013A (ja) * | 2013-06-26 | 2015-01-19 | 京セラ株式会社 | 多層配線基板およびそれを備えたプローブカード用基板 |
JP2017107934A (ja) * | 2015-12-08 | 2017-06-15 | 富士通株式会社 | 回路基板、電子機器、及び回路基板の製造方法 |
JP2018148126A (ja) * | 2017-03-08 | 2018-09-20 | 日本特殊陶業株式会社 | 配線基板、及び配線基板の製造方法 |
Family Cites Families (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5343164B2 (ja) | 2010-03-31 | 2013-11-13 | 京セラ株式会社 | インターポーザー及びそれを用いた電子装置 |
WO2013042750A1 (ja) | 2011-09-22 | 2013-03-28 | 日立化成株式会社 | 積層体、積層板、多層積層板、プリント配線板及び積層板の製造方法 |
US20130180769A1 (en) * | 2011-09-22 | 2013-07-18 | Hitachi Chemical Company, Ltd. | Laminate body, laminate plate, multilayer laminate plate, printed wiring board, and method for manufacture of laminate plate |
US20130112459A1 (en) | 2011-09-22 | 2013-05-09 | Hitachi Chemical Company, Ltd. | Laminate body, laminate plate, multilayer laminate plate, printed wiring board, and method for manufacture of laminate plate |
JP2019079856A (ja) * | 2017-10-20 | 2019-05-23 | トヨタ自動車株式会社 | 多層基板の製造方法 |
JP2019140226A (ja) * | 2018-02-09 | 2019-08-22 | 富士通株式会社 | 回路基板、回路基板の製造方法及び電子装置 |
-
2018
- 2018-11-14 JP JP2018214108A patent/JP7222666B2/ja active Active
-
2019
- 2019-10-24 US US16/662,440 patent/US11152291B2/en active Active
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6216598A (ja) * | 1985-07-15 | 1987-01-24 | 富士通株式会社 | 多層セラミツク回路基板の接続ピン形成方法 |
JPH02142198A (ja) * | 1988-11-22 | 1990-05-31 | Matsushita Electric Works Ltd | セラミック多層配線板の製造方法 |
JP2001267746A (ja) * | 2000-03-17 | 2001-09-28 | Hitachi Ltd | 多層配線基板 |
JP2015012013A (ja) * | 2013-06-26 | 2015-01-19 | 京セラ株式会社 | 多層配線基板およびそれを備えたプローブカード用基板 |
JP2017107934A (ja) * | 2015-12-08 | 2017-06-15 | 富士通株式会社 | 回路基板、電子機器、及び回路基板の製造方法 |
JP2018148126A (ja) * | 2017-03-08 | 2018-09-20 | 日本特殊陶業株式会社 | 配線基板、及び配線基板の製造方法 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2023189540A1 (ja) * | 2022-03-30 | 2023-10-05 | ソニーセミコンダクタソリューションズ株式会社 | ガラス配線基板及びその製造方法、撮像装置 |
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JP7222666B2 (ja) | 2023-02-15 |
US11152291B2 (en) | 2021-10-19 |
US20200152562A1 (en) | 2020-05-14 |
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