JP2019096376A5 - - Google Patents

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JP2019096376A5
JP2019096376A5 JP2018217444A JP2018217444A JP2019096376A5 JP 2019096376 A5 JP2019096376 A5 JP 2019096376A5 JP 2018217444 A JP2018217444 A JP 2018217444A JP 2018217444 A JP2018217444 A JP 2018217444A JP 2019096376 A5 JP2019096376 A5 JP 2019096376A5
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normal
defective
semiconductor memory
target
memory device
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JP2018217444A
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JP7271139B2 (ja
JP2019096376A (ja
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JP2018217444A 2017-11-24 2018-11-20 半導体メモリ装置及びその動作方法 Active JP7271139B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR10-2017-0158829 2017-11-24
KR1020170158829A KR20190060527A (ko) 2017-11-24 2017-11-24 반도체 메모리 장치 및 그 동작 방법

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JP2019096376A JP2019096376A (ja) 2019-06-20
JP2019096376A5 true JP2019096376A5 (https=) 2021-11-25
JP7271139B2 JP7271139B2 (ja) 2023-05-11

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JP2018217444A Active JP7271139B2 (ja) 2017-11-24 2018-11-20 半導体メモリ装置及びその動作方法

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US (1) US10692582B2 (https=)
JP (1) JP7271139B2 (https=)
KR (1) KR20190060527A (https=)
CN (1) CN110010187B (https=)
DE (1) DE102018122491A1 (https=)

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