KR20190060527A - 반도체 메모리 장치 및 그 동작 방법 - Google Patents

반도체 메모리 장치 및 그 동작 방법 Download PDF

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Publication number
KR20190060527A
KR20190060527A KR1020170158829A KR20170158829A KR20190060527A KR 20190060527 A KR20190060527 A KR 20190060527A KR 1020170158829 A KR1020170158829 A KR 1020170158829A KR 20170158829 A KR20170158829 A KR 20170158829A KR 20190060527 A KR20190060527 A KR 20190060527A
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South Korea
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normal area
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KR1020170158829A
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English (en)
Korean (ko)
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김경륜
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삼성전자주식회사
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Priority to KR1020170158829A priority Critical patent/KR20190060527A/ko
Priority to US16/130,544 priority patent/US10692582B2/en
Priority to DE102018122491.5A priority patent/DE102018122491A1/de
Priority to JP2018217444A priority patent/JP7271139B2/ja
Priority to CN201811409219.1A priority patent/CN110010187B/zh
Publication of KR20190060527A publication Critical patent/KR20190060527A/ko
Withdrawn legal-status Critical Current

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    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/76—Masking faults in memories by using spares or by reconfiguring using address translation or modifications
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/18—Address generation devices; Devices for accessing memories, e.g. details of addressing circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/04—Detection or location of defective memory elements, e.g. cell constructio details, timing of test signals
    • G11C29/08—Functional testing, e.g. testing during refresh, power-on self testing [POST] or distributed testing
    • G11C29/12—Built-in arrangements for testing, e.g. built-in self testing [BIST] or interconnection details
    • G11C29/44—Indication or identification of errors, e.g. for repair
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/785—Masking faults in memories by using spares or by reconfiguring using programmable devices with redundancy programming schemes
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/80—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout
    • G11C29/806—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout by reducing size of decoders
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/80—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout
    • G11C29/808—Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout using a flexible replacement scheme

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  • For Increasing The Reliability Of Semiconductor Memories (AREA)
KR1020170158829A 2017-11-24 2017-11-24 반도체 메모리 장치 및 그 동작 방법 Withdrawn KR20190060527A (ko)

Priority Applications (5)

Application Number Priority Date Filing Date Title
KR1020170158829A KR20190060527A (ko) 2017-11-24 2017-11-24 반도체 메모리 장치 및 그 동작 방법
US16/130,544 US10692582B2 (en) 2017-11-24 2018-09-13 Semiconductor memory device and method of operating the same
DE102018122491.5A DE102018122491A1 (de) 2017-11-24 2018-09-14 Halbleiterspeichervorrichtung und verfahren zum betreiben derselben
JP2018217444A JP7271139B2 (ja) 2017-11-24 2018-11-20 半導体メモリ装置及びその動作方法
CN201811409219.1A CN110010187B (zh) 2017-11-24 2018-11-23 半导体存储器装置及其操作方法

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020170158829A KR20190060527A (ko) 2017-11-24 2017-11-24 반도체 메모리 장치 및 그 동작 방법

Publications (1)

Publication Number Publication Date
KR20190060527A true KR20190060527A (ko) 2019-06-03

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020170158829A Withdrawn KR20190060527A (ko) 2017-11-24 2017-11-24 반도체 메모리 장치 및 그 동작 방법

Country Status (5)

Country Link
US (1) US10692582B2 (https=)
JP (1) JP7271139B2 (https=)
KR (1) KR20190060527A (https=)
CN (1) CN110010187B (https=)
DE (1) DE102018122491A1 (https=)

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CN114830241A (zh) * 2019-12-31 2022-07-29 华为技术有限公司 一种存储器的失效修复方法及装置
US11797371B2 (en) 2020-08-18 2023-10-24 Changxin Memory Technologies, Inc. Method and device for determining fail bit repair scheme
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CN116343883B (zh) * 2021-12-22 2025-11-21 浙江驰拓科技有限公司 一种存储器及存储器修复方法
US11989417B1 (en) 2022-10-31 2024-05-21 Nxp Usa, Inc. Column repair in a memory system using a repair cache
CN118212966A (zh) * 2022-12-08 2024-06-18 长鑫存储技术有限公司 一种信号传输电路及其方法、存储器和电子设备
CN115881202B (zh) * 2023-02-09 2023-05-12 长鑫存储技术有限公司 一种修复电路及方法、存储器和电子设备

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Also Published As

Publication number Publication date
US20190164621A1 (en) 2019-05-30
CN110010187A (zh) 2019-07-12
CN110010187B (zh) 2024-09-17
JP7271139B2 (ja) 2023-05-11
US10692582B2 (en) 2020-06-23
JP2019096376A (ja) 2019-06-20
DE102018122491A1 (de) 2019-05-29

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PA0109 Patent application

Patent event code: PA01091R01D

Comment text: Patent Application

Patent event date: 20171124

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