JP2018528621A5 - - Google Patents

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Publication number
JP2018528621A5
JP2018528621A5 JP2018515543A JP2018515543A JP2018528621A5 JP 2018528621 A5 JP2018528621 A5 JP 2018528621A5 JP 2018515543 A JP2018515543 A JP 2018515543A JP 2018515543 A JP2018515543 A JP 2018515543A JP 2018528621 A5 JP2018528621 A5 JP 2018528621A5
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JP
Japan
Prior art keywords
film
sidewall
dopant
sidewalls
depositing
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Application number
JP2018515543A
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English (en)
Japanese (ja)
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JP2018528621A (ja
JP6842616B2 (ja
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Priority claimed from PCT/US2016/053099 external-priority patent/WO2017053558A1/en
Publication of JP2018528621A publication Critical patent/JP2018528621A/ja
Publication of JP2018528621A5 publication Critical patent/JP2018528621A5/ja
Application granted granted Critical
Publication of JP6842616B2 publication Critical patent/JP6842616B2/ja
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JP2018515543A 2015-09-24 2016-09-22 凹部フィーチャ内での膜のボトムアップ式付着のための方法 Active JP6842616B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201562232027P 2015-09-24 2015-09-24
US62/232,027 2015-09-24
PCT/US2016/053099 WO2017053558A1 (en) 2015-09-24 2016-09-22 Method for bottom-up deposition of a film in a recessed feature

Publications (3)

Publication Number Publication Date
JP2018528621A JP2018528621A (ja) 2018-09-27
JP2018528621A5 true JP2018528621A5 (enExample) 2019-10-31
JP6842616B2 JP6842616B2 (ja) 2021-03-17

Family

ID=58387284

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2018515543A Active JP6842616B2 (ja) 2015-09-24 2016-09-22 凹部フィーチャ内での膜のボトムアップ式付着のための方法

Country Status (5)

Country Link
US (1) US10079151B2 (enExample)
JP (1) JP6842616B2 (enExample)
KR (1) KR102522329B1 (enExample)
TW (1) TWI656580B (enExample)
WO (1) WO2017053558A1 (enExample)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2018200211A1 (en) * 2017-04-24 2018-11-01 Applied Materials, Inc. Methods for gapfill in high aspect ratio structures
JP7443250B2 (ja) * 2018-05-16 2024-03-05 アプライド マテリアルズ インコーポレイテッド 原子層自己整合基板の処理及び統合型ツールセット

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI236053B (en) * 2003-11-25 2005-07-11 Promos Technologies Inc Method of selectively etching HSG layer in deep trench capacitor fabrication
US7041553B2 (en) 2004-06-02 2006-05-09 International Business Machines Corporation Process for forming a buried plate
US7148155B1 (en) * 2004-10-26 2006-12-12 Novellus Systems, Inc. Sequential deposition/anneal film densification method
KR100744071B1 (ko) 2006-03-31 2007-07-30 주식회사 하이닉스반도체 벌브형 리세스 게이트를 갖는 반도체 소자의 제조방법
US7838928B2 (en) * 2008-06-06 2010-11-23 Qimonda Ag Word line to bit line spacing method and apparatus
US8592266B2 (en) 2010-10-27 2013-11-26 International Business Machines Corporation Replacement gate MOSFET with a high performance gate electrode
US8809170B2 (en) 2011-05-19 2014-08-19 Asm America Inc. High throughput cyclical epitaxial deposition and etch process
US8846536B2 (en) 2012-03-05 2014-09-30 Novellus Systems, Inc. Flowable oxide film with tunable wet etch rate
KR101955321B1 (ko) * 2012-07-25 2019-03-07 파워 인티그레이션즈, 인크. 테이퍼진 산화물의 형성 방법
US8765609B2 (en) * 2012-07-25 2014-07-01 Power Integrations, Inc. Deposit/etch for tapered oxide
US9177780B2 (en) 2012-10-02 2015-11-03 Applied Materials, Inc. Directional SiO2 etch using plasma pre-treatment and high-temperature etchant deposition
US9728623B2 (en) * 2013-06-19 2017-08-08 Varian Semiconductor Equipment Associates, Inc. Replacement metal gate transistor
US9460932B2 (en) 2013-11-11 2016-10-04 Applied Materials, Inc. Surface poisoning using ALD for high selectivity deposition of high aspect ratio features
US9385222B2 (en) * 2014-02-14 2016-07-05 Infineon Technologies Ag Semiconductor device with insert structure at a rear side and method of manufacturing

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