JP2018515909A5 - - Google Patents

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Publication number
JP2018515909A5
JP2018515909A5 JP2017550144A JP2017550144A JP2018515909A5 JP 2018515909 A5 JP2018515909 A5 JP 2018515909A5 JP 2017550144 A JP2017550144 A JP 2017550144A JP 2017550144 A JP2017550144 A JP 2017550144A JP 2018515909 A5 JP2018515909 A5 JP 2018515909A5
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JP
Japan
Prior art keywords
electronic system
capacitor
metal
electronic
holes
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Application number
JP2017550144A
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English (en)
Japanese (ja)
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JP6757737B2 (ja
JP2018515909A (ja
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Priority claimed from US14/668,085 external-priority patent/US9572261B2/en
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Publication of JP2018515909A publication Critical patent/JP2018515909A/ja
Publication of JP2018515909A5 publication Critical patent/JP2018515909A5/ja
Application granted granted Critical
Publication of JP6757737B2 publication Critical patent/JP6757737B2/ja
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JP2017550144A 2015-03-25 2016-03-23 容量性構造のための導電性スルーポリマービア Active JP6757737B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US14/668,085 2015-03-25
US14/668,085 US9572261B2 (en) 2015-03-25 2015-03-25 Conductive through-polymer vias for capacitative structures integrated with packaged semiconductor chips
PCT/US2016/023817 WO2016154339A1 (fr) 2015-03-25 2016-03-23 Polymère conducteurs à trous d'interconnexion pour structures capacitives

Publications (3)

Publication Number Publication Date
JP2018515909A JP2018515909A (ja) 2018-06-14
JP2018515909A5 true JP2018515909A5 (fr) 2019-04-04
JP6757737B2 JP6757737B2 (ja) 2020-09-23

Family

ID=56976000

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2017550144A Active JP6757737B2 (ja) 2015-03-25 2016-03-23 容量性構造のための導電性スルーポリマービア

Country Status (4)

Country Link
US (2) US9572261B2 (fr)
JP (1) JP6757737B2 (fr)
CN (1) CN107251255B (fr)
WO (1) WO2016154339A1 (fr)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9572261B2 (en) * 2015-03-25 2017-02-14 Texas Instruments Incorporated Conductive through-polymer vias for capacitative structures integrated with packaged semiconductor chips
TWI653715B (zh) * 2016-05-13 2019-03-11 日商村田製作所股份有限公司 晶圓級封裝及電容器
US9865527B1 (en) 2016-12-22 2018-01-09 Texas Instruments Incorporated Packaged semiconductor device having nanoparticle adhesion layer patterned into zones of electrical conductance and insulation
US9941194B1 (en) 2017-02-21 2018-04-10 Texas Instruments Incorporated Packaged semiconductor device having patterned conductance dual-material nanoparticle adhesion layer
US20190051596A1 (en) * 2017-08-10 2019-02-14 Applied Materials, Inc. Method of increasing embedded 3d metal-insulator-metal (mim) capacitor capacitance density for wafer level packaging
US10867752B2 (en) * 2017-09-28 2020-12-15 Samsung Electro-Mechanics Co., Ltd. Capacitor and method of manufacturing the same
US10566276B2 (en) 2017-11-08 2020-02-18 Texas Instruments Incorporated Packaged semiconductor system having unidirectional connections to discrete components
DE112020001192B4 (de) * 2019-03-12 2024-08-29 KYOCERA AVX Components Corporation (n. d. Ges. d. Staates Delaware) Doppelseitiges hochleistungs-dünnschichtfilter
CN115039190B (zh) * 2020-03-24 2023-08-25 株式会社村田制作所 电容器
DE102020119611A1 (de) 2020-07-24 2022-01-27 Infineon Technologies Ag Schaltungsanordnung und verfahren zum bilden einer schaltungsanordnung
US11315453B1 (en) * 2020-11-08 2022-04-26 Innolux Corporation Tiled display device with a test circuit
WO2024024933A1 (fr) * 2022-07-29 2024-02-01 ソニーセミコンダクタソリューションズ株式会社 Dispositif à semi-conducteur, son procédé de fabrication et appareil électronique

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Publication number Priority date Publication date Assignee Title
JPH08116030A (ja) * 1994-10-12 1996-05-07 Inter Nix Kk 半導体集積回路装置
EP0837504A3 (fr) 1996-08-20 1999-01-07 Ramtron International Corporation Dispositif ferroélectrique partiellement ou complètement encapsulé
US5825628A (en) 1996-10-03 1998-10-20 International Business Machines Corporation Electronic package with enhanced pad design
JP2002057037A (ja) * 2000-08-09 2002-02-22 Fuji Electric Co Ltd 複合集積回路およびその製造方法
JP4795521B2 (ja) * 2000-10-16 2011-10-19 富士通株式会社 半導体装置及びその製造方法
US6388207B1 (en) 2000-12-29 2002-05-14 Intel Corporation Electronic assembly with trench structures and methods of manufacture
US8174017B2 (en) 2005-08-17 2012-05-08 Georgia Tech Research Corporation Integrating three-dimensional high capacitance density structures
JP2008071935A (ja) * 2006-09-14 2008-03-27 Toshiba Corp 半導体装置
DE102006055576A1 (de) * 2006-11-21 2008-05-29 Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. Verfahren zum Herstellen eines dehnbaren Schaltungsträgers und dehnbarer Schaltungsträger
JP4869991B2 (ja) * 2007-03-14 2012-02-08 富士通株式会社 キャパシタ内蔵ウェハレベルパッケージ及びその製造方法
EP2147499B1 (fr) 2007-05-10 2016-08-17 Nxp B.V. Convertisseur cc-cc comprenant une unite de condensateur reconfigurable
JP4962339B2 (ja) 2008-02-07 2012-06-27 富士通株式会社 キャパシタの製造方法
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JP2011040602A (ja) * 2009-08-12 2011-02-24 Renesas Electronics Corp 電子装置およびその製造方法
KR20130018644A (ko) * 2009-12-16 2013-02-25 애프리콧 머티어리얼즈 테크놀로지스, 엘엘씨 3-차원의 높은 표면 영역 전극을 갖는 캐패시터 및 제조 방법
JP2011159856A (ja) * 2010-02-02 2011-08-18 Sanyo Electric Co Ltd コンデンサ用電極体、コンデンサおよびそれらの製造方法
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US9572261B2 (en) * 2015-03-25 2017-02-14 Texas Instruments Incorporated Conductive through-polymer vias for capacitative structures integrated with packaged semiconductor chips

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