JP2018133598A - 半導体装置およびその製造方法 - Google Patents
半導体装置およびその製造方法 Download PDFInfo
- Publication number
- JP2018133598A JP2018133598A JP2018108039A JP2018108039A JP2018133598A JP 2018133598 A JP2018133598 A JP 2018133598A JP 2018108039 A JP2018108039 A JP 2018108039A JP 2018108039 A JP2018108039 A JP 2018108039A JP 2018133598 A JP2018133598 A JP 2018133598A
- Authority
- JP
- Japan
- Prior art keywords
- insulating substrate
- case
- semiconductor device
- resin
- outer edge
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
- H01L2224/0601—Structure
- H01L2224/0603—Bonding areas having different sizes, e.g. different heights or widths
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/4501—Shape
- H01L2224/45012—Cross-sectional shape
- H01L2224/45014—Ribbon connectors, e.g. rectangular cross-section
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/4501—Shape
- H01L2224/45012—Cross-sectional shape
- H01L2224/45015—Cross-sectional shape being circular
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/45124—Aluminium (Al) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45147—Copper (Cu) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
- H01L2224/48139—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate with an intermediate bond, e.g. continuous wire daisy chain
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4846—Connecting portions with multiple bonds on the same bonding area
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/484—Connecting portions
- H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
- H01L2224/48472—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond the other connecting portion not on the bonding area also being a wedge bond, i.e. wedge-to-wedge
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/4901—Structure
- H01L2224/4903—Connectors having different sizes, e.g. different diameters
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
- H01L2224/491—Disposition
- H01L2224/4911—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain
- H01L2224/49111—Disposition the connectors being bonded to at least one common bonding area, e.g. daisy chain the connectors connecting two common bonding areas, e.g. Litz or braid wires
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
- H01L2224/852—Applying energy for connecting
- H01L2224/85201—Compression bonding
- H01L2224/85205—Ultrasonic bonding
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19107—Disposition of discrete passive components off-chip wires
Landscapes
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Abstract
【解決手段】半導体装置は、絶縁基板1と、絶縁基板1の第1の面上に配置された半導体素子3と、半導体素子を内側に収容するように絶縁基板1と接続されたケース51と、ケース51の内側に半導体素子を埋め込むように充填された樹脂6とを備え、絶縁基板1の厚みをt1、樹脂6の厚みをt2、絶縁基板1の線膨張係数をα1、樹脂の線膨張係数をα2とした場合に、t2≧t1、およびα2≧α1、という関係式を満足し、絶縁基板1は第1の面と反対側の第2の面が凸形状となるように反っている。
【選択図】図1
Description
図1は本発明の実施の形態1による半導体装置の断面模式図である。図2は図1に示した半導体装置の上面図であり、説明のためダイレクトポッティング封止樹脂(ダイレクトポッティングにより形成された封止樹脂、以下単に封止樹脂とも呼ぶ)の表示を省略している。
図1および図2を参照して、半導体装置は、絶縁基板1(以下、基板1とも呼ぶ)と、半導体素子としてのパワー半導体素子3と、ケース51と、ケース51内に充填されている樹脂としてのダイレクトポッティング封止樹脂6(以下、単に封止樹脂6とも呼ぶ)とを主に備える。半導体装置はさらに、半導体装置の外部に位置する外部部材の一例である冷却部材としての冷却器54にケース51を固定する固定部材としてのネジ52を備える。絶縁基板1の厚みをt1、ダイレクトポッティング封止樹脂6の厚みをt2、絶縁基板1の線膨張係数をα1、ダイレクトポッティング封止樹脂6の線膨張係数をα2とした場合に、半導体装置はt2≧t1、およびα2≧α1、という関係式を満足する。絶縁基板1は、パワー半導体素子3が配置された第1の面と反対側の第2の面が凸形状となるように反っている。
図3は、図1および図2に示した半導体装置の製造方法を示すフローチャートである。図4〜図6は、図3に示した製造方法を説明するための断面模式図である。以下、図3〜図6を参照して、半導体装置の製造方法を説明する。
図9は本発明の実施の形態2による半導体装置の断面模式図である。
半導体装置は、基本的には図1に示した半導体装置と同様の構成を備えるが、ネジ52によりケース51および絶縁基板1を固定する部分の構成が図1に示した半導体装置とは異なっている。すなわち、ケース51は、平面視において絶縁基板1の外縁と重なる部分としてのスリーブ部53を有している。スリーブ部53の下にまで絶縁基板1の外縁が伸びている。また異なる観点からいえば、図1の半導体装置では段差部511がスリーブ部53より内周側に形成されていたのに対して、図9に示した半導体装置では段差部511はスリーブ部53に形成されている。スリーブ部53と絶縁基板1の外縁とを貫通するように貫通穴が形成されている。スリーブ部53および絶縁基板1の外縁を冷却器54と固定するように、固定部材としてのネジ52が貫通穴を挿通した状態で固定されている。
図9に示した半導体装置の製造方法は、準備する絶縁基板1やケース51のサイズや形状などが図1に示した半導体装置とは異なっているが、基本的には図1に示した半導体装置の製造方法と同様である。
Claims (6)
- 絶縁基板と、
前記絶縁基板の第1の面上に配置された半導体素子と、
前記半導体素子を内側に収容するように前記絶縁基板と接続されたケースと、
前記ケースの内側に前記半導体素子を埋め込むように充填された樹脂とを備え、
前記絶縁基板の厚みをt1、前記樹脂の厚みをt2、前記絶縁基板の線膨張係数をα1、前記樹脂の線膨張係数をα2とした場合に、
t2≧t1、および
α2≧α1、という関係式を満足し、
前記絶縁基板は前記第1の面と反対側の第2の面が凸形状となるように反っており、
前記ケースは、平面視において前記絶縁基板の外縁と重なる部分を有し、
前記ケースの前記重なる部分と前記絶縁基板の前記外縁とが接着剤により接続され、
前記ケースは、前記重なる部分から前記絶縁基板の前記外縁より外側に延在する部分を有し、
前記ケースの前記延在する部分は、第1高さを有する第1部分と、前記第1部分より外側に位置し、前記第1高さより低い第2高さを有する第2部分とを含む、半導体装置。 - 前記ケースの前記延在する部分を前記半導体装置の外部に位置する外部部材と固定する固定部材をさらに備え、
前記重なる部分には、前記絶縁基板の前記外縁を収容する段差部が形成されており、
前記段差部の深さは、前記絶縁基板の厚みと、前記絶縁基板の前記外縁を前記ケースの前記段差部により押圧していない状態における前記絶縁基板の反り量との合計値より小さい、請求項1に記載の半導体装置。 - 前記ケースは、前記重なる部分と前記外部部材との間に前記絶縁基板の前記外縁を挟んだ状態で前記固定部材を用いて前記外部部材に固定されることにより、弾性変形している、請求項2に記載の半導体装置。
- 絶縁基板の第1の面上に半導体素子を配置するとともに、前記半導体素子を内部に収容するように前記絶縁基板と接続されたケースを準備する工程と、
前記ケースの内部に前記半導体素子を埋め込むように樹脂を充填する工程とを備え、
前記絶縁基板の厚みをt1、前記樹脂の厚みをt2、前記絶縁基板の線膨張係数をα1、前記樹脂の線膨張係数をα2とした場合に、
t2≧t1、および
α2≧α1、という関係式を満足し、
前記樹脂を充填する工程の後、前記絶縁基板の前記第1の面と反対側の第2の面が凸形状となるように反っており、
前記準備する工程において、前記ケースは、平面視において前記絶縁基板の外縁と重なる部分と、前記重なる部分から前記絶縁基板の前記外縁より外側に延在する部分とを有し、
前記ケースの前記延在する部分は、第1高さを有する第1部分と、前記第1部分より外側に位置し、前記第1高さより低い第2高さを有する第2部分とを含み、
前記準備する工程において、前記ケースの前記重なる部分と前記絶縁基板の前記外縁とが接着剤により接続される、半導体装置の製造方法。 - 前記樹脂を充填する工程の後、前記絶縁基板の前記第2の面を前記半導体装置の外部に位置する外部部材に接続する工程をさらに備え、
前記重なる部分には、前記絶縁基板の前記外縁を収容する段差部が形成されており、
前記段差部の深さは、前記絶縁基板の厚みと、前記絶縁基板の前記外縁を前記ケースの前記段差部により押圧していない状態における前記絶縁基板の反り量との合計値より小さく、
前記接続する工程では、固定部材を用いて前記ケースの前記延在する部分を前記外部部材に固定する、請求項4に記載の半導体装置の製造方法。 - 前記接続する工程において、前記ケースは、前記重なる部分と前記外部部材との間に前記絶縁基板の前記外縁を挟んだ状態で前記固定部材を用いて前記外部部材に固定されることにより、弾性変形する、請求項5に記載の半導体装置の製造方法。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2018108039A JP2018133598A (ja) | 2018-06-05 | 2018-06-05 | 半導体装置およびその製造方法 |
JP2020066963A JP6906654B2 (ja) | 2018-06-05 | 2020-04-02 | 半導体装置およびその製造方法 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2018108039A JP2018133598A (ja) | 2018-06-05 | 2018-06-05 | 半導体装置およびその製造方法 |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2014183972A Division JP6356550B2 (ja) | 2014-09-10 | 2014-09-10 | 半導体装置およびその製造方法 |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2020066963A Division JP6906654B2 (ja) | 2018-06-05 | 2020-04-02 | 半導体装置およびその製造方法 |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2018133598A true JP2018133598A (ja) | 2018-08-23 |
Family
ID=63248986
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2018108039A Pending JP2018133598A (ja) | 2018-06-05 | 2018-06-05 | 半導体装置およびその製造方法 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP2018133598A (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102019118662A1 (de) | 2018-04-26 | 2020-01-16 | Hitachi Metals, Ltd. | Turbo-Rotationssensor-Herstellungsverfahren |
WO2022054929A1 (ja) * | 2020-09-14 | 2022-03-17 | パナソニックIpマネジメント株式会社 | 熱伝導性材料及び電子部品 |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11330328A (ja) * | 1998-05-14 | 1999-11-30 | Denso Corp | 半導体モジュール |
JP2000200865A (ja) * | 1999-01-06 | 2000-07-18 | Shibafu Engineering Kk | 絶縁基板及び半導体装置 |
JP2001127238A (ja) * | 1999-10-27 | 2001-05-11 | Mitsubishi Electric Corp | 半導体モジュール及び半導体モジュール用絶縁基板 |
JP2010034346A (ja) * | 2008-07-30 | 2010-02-12 | Sanyo Electric Co Ltd | 回路装置 |
JP2013229369A (ja) * | 2012-04-24 | 2013-11-07 | Denso Corp | モールドパッケージ |
WO2014041936A1 (ja) * | 2012-09-13 | 2014-03-20 | 富士電機株式会社 | 半導体装置、半導体装置に対する放熱部材の取り付け方法及び半導体装置の製造方法 |
-
2018
- 2018-06-05 JP JP2018108039A patent/JP2018133598A/ja active Pending
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH11330328A (ja) * | 1998-05-14 | 1999-11-30 | Denso Corp | 半導体モジュール |
JP2000200865A (ja) * | 1999-01-06 | 2000-07-18 | Shibafu Engineering Kk | 絶縁基板及び半導体装置 |
JP2001127238A (ja) * | 1999-10-27 | 2001-05-11 | Mitsubishi Electric Corp | 半導体モジュール及び半導体モジュール用絶縁基板 |
JP2010034346A (ja) * | 2008-07-30 | 2010-02-12 | Sanyo Electric Co Ltd | 回路装置 |
JP2013229369A (ja) * | 2012-04-24 | 2013-11-07 | Denso Corp | モールドパッケージ |
WO2014041936A1 (ja) * | 2012-09-13 | 2014-03-20 | 富士電機株式会社 | 半導体装置、半導体装置に対する放熱部材の取り付け方法及び半導体装置の製造方法 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102019118662A1 (de) | 2018-04-26 | 2020-01-16 | Hitachi Metals, Ltd. | Turbo-Rotationssensor-Herstellungsverfahren |
WO2022054929A1 (ja) * | 2020-09-14 | 2022-03-17 | パナソニックIpマネジメント株式会社 | 熱伝導性材料及び電子部品 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP6356550B2 (ja) | 半導体装置およびその製造方法 | |
US9887154B2 (en) | Semiconductor device and method of manufacturing the semiconductor device | |
JP6327140B2 (ja) | 電子装置 | |
CN106847781B (zh) | 功率模块封装及其制造方法 | |
JP4385324B2 (ja) | 半導体モジュールおよびその製造方法 | |
JP6217884B2 (ja) | 半導体装置とその製造方法 | |
CN113454774A (zh) | 封装芯片及封装芯片的制作方法 | |
JP2010192591A (ja) | 電力用半導体装置とその製造方法 | |
JP6360035B2 (ja) | 半導体装置 | |
JP2018133598A (ja) | 半導体装置およびその製造方法 | |
JP2015076511A (ja) | 半導体装置およびその製造方法 | |
JP2012138475A (ja) | 半導体モジュールおよび半導体モジュールの製造方法 | |
JP5840102B2 (ja) | 電力用半導体装置 | |
US8686545B2 (en) | Semiconductor device and method for manufacturing the same | |
JP6906654B2 (ja) | 半導体装置およびその製造方法 | |
JP6698965B1 (ja) | 半導体装置、電力変換装置および半導体装置の製造方法 | |
JP2008181922A (ja) | 熱伝導基板、その製造方法および熱伝導基板を用いた半導体装置 | |
JP6813728B2 (ja) | パワー半導体モジュール用パッケージの製造方法およびパワー半導体モジュール用パッケージ | |
JP7482833B2 (ja) | 半導体装置および半導体装置の製造方法 | |
JP6301031B1 (ja) | 半導体装置 | |
WO2021028965A1 (ja) | 半導体装置 | |
JP2023127609A (ja) | 半導体装置 | |
JP2023124230A (ja) | 電力用半導体装置 | |
JP2022050058A (ja) | 半導体装置及び半導体装置の製造方法 | |
JP2004253689A (ja) | 半導体素子搭載モジュールの製造方法 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20180605 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20190129 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20190131 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20190308 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20190806 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20190920 |
|
A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20200218 |