JP2017050421A - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP2017050421A JP2017050421A JP2015173184A JP2015173184A JP2017050421A JP 2017050421 A JP2017050421 A JP 2017050421A JP 2015173184 A JP2015173184 A JP 2015173184A JP 2015173184 A JP2015173184 A JP 2015173184A JP 2017050421 A JP2017050421 A JP 2017050421A
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor region
- type semiconductor
- type
- region
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 431
- 230000015556 catabolic process Effects 0.000 abstract description 13
- 238000009413 insulation Methods 0.000 abstract 2
- 239000012535 impurity Substances 0.000 description 28
- 239000000758 substrate Substances 0.000 description 7
- 238000000034 method Methods 0.000 description 6
- 239000000969 carrier Substances 0.000 description 3
- 238000006243 chemical reaction Methods 0.000 description 3
- 230000005684 electric field Effects 0.000 description 3
- 238000004519 manufacturing process Methods 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 2
- 230000006378 damage Effects 0.000 description 2
- 238000010438 heat treatment Methods 0.000 description 2
- 238000005468 ion implantation Methods 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 238000001004 secondary ion mass spectrometry Methods 0.000 description 2
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 description 1
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 229910052785 arsenic Inorganic materials 0.000 description 1
- RQNWIZPPADIBDY-UHFFFAOYSA-N arsenic atom Chemical compound [As] RQNWIZPPADIBDY-UHFFFAOYSA-N 0.000 description 1
- 229910052796 boron Inorganic materials 0.000 description 1
- 239000012141 concentrate Substances 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 238000001312 dry etching Methods 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 229910052698 phosphorus Inorganic materials 0.000 description 1
- 239000011574 phosphorus Substances 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 238000011084 recovery Methods 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0626—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a localised breakdown region, e.g. built-in avalanching region
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
- H01L29/0607—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration
- H01L29/0611—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices
- H01L29/0615—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
- H01L29/0619—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions for preventing surface leakage or controlling electric field concentration for increasing or controlling the breakdown voltage of reverse biased devices by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE] with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
- H01L29/0623—Buried supplementary region, e.g. buried guard ring
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
- H01L29/0692—Surface layout
- H01L29/0696—Surface layout of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
- H01L29/083—Anode or cathode regions of thyristors or gated bipolar-mode devices
- H01L29/0834—Anode regions of thyristors or gated bipolar-mode devices, e.g. supplementary regions surrounding anode regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7395—Vertical transistors, e.g. vertical IGBT
- H01L29/7396—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
- H01L29/7397—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
- H01L29/861—Diodes
- H01L29/872—Schottky diodes
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Electrodes Of Semiconductors (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Abstract
【解決手段】半導体装置100はダイオードであり、カソードを構成するn−形の半導体領域1と、アノードを構成するp−形の半導体領域2と、p形半導体領域3と、p形半導体領域4と、絶縁部10を有する。半導体領域4は半導体領域3と離間しており、半導体領域4の深さはp形半導体領域3よりも深い。絶縁部10は、半導体領域4の上と、半導体領域3と半導体領域4との間に位置するp−形半導体領域2の一部の上と、に設けられている。
【選択図】図1
Description
前記第2半導体領域は、前記第1半導体領域上に設けられている。
前記第3半導体領域の少なくとも一部は、前記第2半導体領域に囲まれている。
前記第4半導体領域の少なくとも一部は、前記第2半導体領域に囲まれている。前記第4半導体領域は、前記第3半導体領域と離間している。前記第4半導体領域の第2導電形のキャリア濃度は、前記第2半導体領域の第2導電形のキャリア濃度よりも高い。前記第4半導体領域の、前記第2半導体領域から前記第1半導体領域に向かう第1方向における端部は、前記第3半導体領域の前記第1方向における端部に対して、前記第1方向側に設けられている。
前記絶縁部は、前記第4半導体領域の上と、前記第3半導体領域と前記第4半導体領域との間に位置する前記第2半導体領域の一部の上と、に設けられている。
なお、図面は模式的または概念的なものであり、各部分の厚みと幅との関係、部分間の大きさの比率などは、必ずしも現実のものと同一とは限らない。また、同じ部分を表す場合であっても、図面により互いの寸法や比率が異なって表される場合もある。
以下の説明において、n+、n、n−及びp+、p、p−の表記は、各導電形における不純物濃度の相対的な高低を表す。すなわち、n+はnよりもn形の不純物濃度が相対的に高く、n−はnよりもn形の不純物濃度が相対的に低いことを示す。また、p+はpよりもp形の不純物濃度が相対的に高く、p−はpよりもp形の不純物濃度が相対的に低いことを示す。
また、本願明細書と各図において、既に説明したものと同様の要素には同一の符号を付して詳細な説明は適宜省略する。
以下で説明する各実施形態について、各半導体領域のn形とp形を反転させて実施することも可能である。
図1〜図3を用いて、第1実施形態に係る半導体装置100について説明する。
図1は、第1実施形態に係る半導体装置100の断面図である。
図2は、第1実施形態に係る半導体装置100の平面図の一例である。
図3は、第1実施形態に係る半導体装置100の平面図の他の一例である。
半導体装置100は、半導体層Sと、アノード電極8(第1電極)と、カソード電極9(第2電極)と、を備える。
半導体層Sは、ダイオードのカソードを構成する、n−形(第1導電形)の半導体領域1(第1半導体領域)およびn+形半導体領域5(第6半導体領域)と、ダイオードのアノードを構成する、p−形(第2導電形)の半導体領域2(第2半導体領域)、p形半導体領域3(第3半導体領域)、およびp形半導体領域4(第4半導体領域)と、を有する。
n−形半導体領域1は、n+形半導体領域5の上に設けられている。n−形半導体領域1は、n+形半導体領域5の上に、一様に設けられている。
p形半導体領域3はX方向において複数設けられている。図1に表す例では、p形半導体領域3は、p−形半導体領域2に囲まれている。あるいは、p形半導体領域3の一部がp−形半導体領域2に囲まれ、p形半導体領域3の他の一部がn−形半導体領域1に囲まれていてもよい。
他の表現によると、n+形半導体領域5とp形半導体領域4との間のZ方向における距離は、n+形半導体領域5とp形半導体領域3との間のZ方向における距離よりも短い。
アノード電極8は、絶縁部10の上に設けられている。
図4は、第1実施形態に係る半導体装置100の製造工程を表す工程断面図である。
本実施形態によれば、インパクトイオン化によるアバランシェ降伏によって半導体装置の破壊が生じる可能性を低減できる。
これは、以下の理由による。
これに対して、本実施形態に係る半導体装置100は、p形半導体領域3、p形半導体領域4、および絶縁部10を有する。p形半導体領域4は、その−Z方向における端部が、p形半導体領域3の−Z方向における端部に対して、−Z方向側に位置している。このため、半導体装置100にサージ電圧が印加された際にp形半導体領域4でインパクトイオン化が生じる可能性は、p形半導体領域3でインパクトイオン化が生じる可能性よりも高い。
図5を用いて、第2実施形態に係る半導体装置200について説明する。
図5は、第2実施形態に係る半導体装置200の断面図である。
図6を用いて、第3実施形態に係る半導体装置300について説明する。
図6は、第3実施形態に係る半導体装置300の断面図である。
半導体層は、n−形(第1導電形)の半導体領域1(第1半導体領域)と、p−形(第2導電形)の半導体領域2(第2半導体領域)と、p形半導体領域3(第3半導体領域)と、p形半導体領域4(第4半導体領域)と、n+形半導体領域5と、p+形コレクタ領域31と、n形バッファ領域32と、p形ベース領域36と、p+形コンタクト領域37と、n+形エミッタ領域38と、ゲート電極33と、ゲート絶縁層34と、絶縁層39と、を有する。
その後、ゲート電極33における電圧が閾値電圧以下になると、p形ベース領域36におけるチャネルが消滅し、IGBTがオフ状態となる。
図7を用いて、第4実施形態に係る半導体装置400について説明する。
図7は、第4実施形態に係る半導体装置400の断面図である。
半導体装置400は、半導体装置300との比較において、例えば、n+形半導体領域5を有しておらず、p形ベース領域36中にp形半導体領域3およびp形半導体領域4が設けられている点で異なる。
図8〜図10を用いて、第5実施形態に係る半導体装置500について説明する。
図8は、第5実施形態に係る半導体装置500の断面図である。
図9は、図8のA−A´線を含む平面図の一例である。
図10は、図8のA−A´線を含む平面図の他の一例である。
p−形半導体領域6は、p−形半導体領域2およびp形半導体領域3よりも−Z方向側に設けられ、n−形半導体領域1に囲まれている。また、p−形半導体領域6は、p形半導体領域4と接している。p−形半導体領域6の一部は、Z方向において、部分2aとn+形半導体領域5との間に位置している。
このため、本実施形態によれば、第1実施形態に比べて、半導体装置の破壊耐量をより一層向上させることが可能となる。
図11を用いて、第6実施形態に係る半導体装置600について説明する。
図11は、第6実施形態に係る半導体装置600の断面図である。
すなわち、本実施形態によれば、インパクトイオン化が生じた際の電流を複数の経路に分散して流すことができ、電流密度を低減することが可能となる。このため、本実施形態によれば、第1実施形態に比べて、半導体装置の破壊耐量をより一層向上させることが可能となる。
また、各半導体領域における不純物濃度については、例えば、SIMS(二次イオン質量分析法)により測定することが可能である。
Claims (9)
- 第1導電形の第1半導体領域と、
前記第1半導体領域の上に設けられた第2導電形の第2半導体領域と、
少なくとも一部が前記第2半導体領域に囲まれた第2導電形の第3半導体領域と、
少なくとも一部が前記第2半導体領域に囲まれ、前記第3半導体領域と離間し、前記第2半導体領域の第2導電形のキャリア濃度よりも高い第2導電形のキャリア濃度を有し、前記第2半導体領域から前記第1半導体領域に向かう第1方向における端部が、前記第3半導体領域の前記第1方向における端部に対して前記第1方向側に設けられた、第2導電形の第4半導体領域と、
前記第4半導体領域の上と、前記第3半導体領域と前記第4半導体領域との間に位置する前記第2半導体領域の一部の上と、に設けられた絶縁部と、
を備えた半導体装置。 - 前記第3半導体領域の第2導電形のキャリア濃度は、前記第2半導体領域の第2導電形のキャリア濃度よりも高い請求項1記載の半導体装置。
- 前記第4半導体領域の第2導電形のキャリア濃度は、前記第3半導体領域の第2導電形のキャリア濃度よりも高い請求項1または2記載の半導体装置。
- 前記第3半導体領域は、前記第1方向に直交する第2方向に延び、
前記第4半導体領域の、前記第1方向および前記第2方向に直交する第3方向における長さは、前記第3半導体領域の前記第3方向における長さよりも短い請求項3に記載の半導体装置。 - 前記絶縁部の一部は、前記第3半導体領域の上に設けられた請求項4記載の半導体装置。
- 前記第3半導体領域は、前記第3方向において複数設けられ、
前記第4半導体領域は、前記第3方向において、複数の前記第3半導体領域の間に設けられ、
前記絶縁部の前記一部は、前記第3方向において前記第4半導体領域に隣り合う前記第3半導体領域の上に設けられた請求項5記載の半導体装置。 - 前記絶縁部の上、前記第2半導体領域の上、および前記第3半導体領域の上に設けられた導電部をさらに備えた請求項1〜6のいずれか1つに記載の半導体装置。
- 前記第2半導体領域は、前記導電部とショットキー接合を形成し、
前記第3半導体領域は、前記導電部とオーミック接合を形成している請求項7記載の半導体装置。 - 前記第2半導体領域は、
第1部分と、
前記第1部分の第2導電形のキャリア濃度よりも低い第2導電形のキャリア濃度を有する第2部分と、
を有し、
前記第3半導体領域の前記少なくとも一部は、前記第1部分に囲まれ、
前記第4半導体領域の前記少なくとも一部は、前記第2部分に囲まれた請求項1〜8のいずれか1つに記載の半導体装置。
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2015173184A JP6588774B2 (ja) | 2015-09-02 | 2015-09-02 | 半導体装置 |
US15/015,271 US9496332B1 (en) | 2015-09-02 | 2016-02-04 | Semiconductor device |
CN201610094153.6A CN106486475A (zh) | 2015-09-02 | 2016-02-19 | 半导体装置 |
TW105105176A TW201711164A (zh) | 2015-09-02 | 2016-02-22 | 半導體裝置 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2015173184A JP6588774B2 (ja) | 2015-09-02 | 2015-09-02 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2017050421A true JP2017050421A (ja) | 2017-03-09 |
JP6588774B2 JP6588774B2 (ja) | 2019-10-09 |
Family
ID=57235115
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2015173184A Active JP6588774B2 (ja) | 2015-09-02 | 2015-09-02 | 半導体装置 |
Country Status (4)
Country | Link |
---|---|
US (1) | US9496332B1 (ja) |
JP (1) | JP6588774B2 (ja) |
CN (1) | CN106486475A (ja) |
TW (1) | TW201711164A (ja) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2019159471A1 (ja) * | 2018-02-16 | 2019-08-22 | 富士電機株式会社 | 半導体装置 |
US10651169B2 (en) | 2018-03-20 | 2020-05-12 | Kabushiki Kaisha Toshiba | Semiconductor device and diode |
Families Citing this family (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10608122B2 (en) * | 2018-03-13 | 2020-03-31 | Semicondutor Components Industries, Llc | Schottky device and method of manufacture |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP4119148B2 (ja) | 2002-04-02 | 2008-07-16 | 株式会社東芝 | ダイオード |
US6979863B2 (en) * | 2003-04-24 | 2005-12-27 | Cree, Inc. | Silicon carbide MOSFETs with integrated antiparallel junction barrier Schottky free wheeling diodes and methods of fabricating the same |
JP2007311822A (ja) | 2007-07-23 | 2007-11-29 | Toshiba Corp | ショットキーバリヤダイオード |
JP2012114104A (ja) * | 2009-02-24 | 2012-06-14 | Hitachi Ltd | 蓄積型絶縁ゲート型電界効果型トランジスタ |
WO2011030454A1 (ja) * | 2009-09-14 | 2011-03-17 | トヨタ自動車株式会社 | ダイオード領域とigbt領域を有する半導体基板を備える半導体装置 |
KR101218459B1 (ko) * | 2010-04-02 | 2013-01-22 | 도요타 지도샤(주) | 다이오드 영역과 igbt 영역을 갖는 반도체 기판을 구비하는 반도체 장치 |
JP6037664B2 (ja) | 2012-06-07 | 2016-12-07 | 株式会社 日立パワーデバイス | 半導体装置およびその製造方法 |
-
2015
- 2015-09-02 JP JP2015173184A patent/JP6588774B2/ja active Active
-
2016
- 2016-02-04 US US15/015,271 patent/US9496332B1/en active Active
- 2016-02-19 CN CN201610094153.6A patent/CN106486475A/zh not_active Withdrawn
- 2016-02-22 TW TW105105176A patent/TW201711164A/zh unknown
Cited By (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2019159471A1 (ja) * | 2018-02-16 | 2019-08-22 | 富士電機株式会社 | 半導体装置 |
JPWO2019159471A1 (ja) * | 2018-02-16 | 2020-07-16 | 富士電機株式会社 | 半導体装置 |
US11088290B2 (en) | 2018-02-16 | 2021-08-10 | Fuji Electric Co., Ltd. | Semiconductor apparatus |
US10651169B2 (en) | 2018-03-20 | 2020-05-12 | Kabushiki Kaisha Toshiba | Semiconductor device and diode |
US10811406B2 (en) | 2018-03-20 | 2020-10-20 | Kabushiki Kaisha Toshiba | Semiconductor device and diode |
Also Published As
Publication number | Publication date |
---|---|
TW201711164A (zh) | 2017-03-16 |
US9496332B1 (en) | 2016-11-15 |
CN106486475A (zh) | 2017-03-08 |
JP6588774B2 (ja) | 2019-10-09 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP5787853B2 (ja) | 電力用半導体装置 | |
JP6445952B2 (ja) | 半導体装置 | |
US10840238B2 (en) | Semiconductor device | |
US10903202B2 (en) | Semiconductor device | |
US10304969B2 (en) | Semiconductor device | |
JP2019054070A (ja) | 半導体装置 | |
KR20160030841A (ko) | 반도체 장치 | |
JPWO2019116696A1 (ja) | 半導体装置 | |
CN110310990B (zh) | 半导体装置 | |
JP2017103456A (ja) | 半導体装置 | |
JP2006332199A (ja) | SiC半導体装置 | |
JP6588774B2 (ja) | 半導体装置 | |
JP2013182905A (ja) | 半導体装置 | |
JP5865860B2 (ja) | 半導体装置 | |
JP2017092378A (ja) | 半導体装置 | |
JP6658955B2 (ja) | 半導体装置 | |
US20220293725A1 (en) | Semiconductor device | |
WO2015107614A1 (ja) | 電力用半導体装置 | |
JP2019106506A (ja) | 半導体装置 | |
JP2014060299A (ja) | 半導体装置 | |
JP2017045874A (ja) | 半導体装置 | |
JP2017157673A (ja) | 半導体装置 | |
JP2015056560A (ja) | 半導体装置 | |
JP7222758B2 (ja) | 半導体装置 | |
JP2016042533A (ja) | 半導体装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A711 | Notification of change in applicant |
Free format text: JAPANESE INTERMEDIATE CODE: A712 Effective date: 20180712 |
|
A711 | Notification of change in applicant |
Free format text: JAPANESE INTERMEDIATE CODE: A711 Effective date: 20180713 |
|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20180717 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A821 Effective date: 20180712 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A821 Effective date: 20180713 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20190315 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20190319 |
|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20190517 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20190819 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20190913 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 6588774 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |