JP2016018871A - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims description 135
- 239000000758 substrate Substances 0.000 claims abstract description 59
- 150000001875 compounds Chemical class 0.000 claims description 74
- 239000012535 impurity Substances 0.000 claims 1
- 239000010410 layer Substances 0.000 description 118
- 239000002184 metal Substances 0.000 description 24
- 229910052751 metal Inorganic materials 0.000 description 24
- 238000002955 isolation Methods 0.000 description 8
- 238000000926 separation method Methods 0.000 description 8
- 239000011229 interlayer Substances 0.000 description 7
- 230000004048 modification Effects 0.000 description 7
- 238000012986 modification Methods 0.000 description 7
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 7
- 229920005591 polysilicon Polymers 0.000 description 7
- 230000005533 two-dimensional electron gas Effects 0.000 description 7
- 239000003990 capacitor Substances 0.000 description 6
- 239000013256 coordination polymer Substances 0.000 description 6
- 239000002344 surface layer Substances 0.000 description 6
- 229910002704 AlGaN Inorganic materials 0.000 description 5
- 238000000034 method Methods 0.000 description 5
- 101100179596 Caenorhabditis elegans ins-3 gene Proteins 0.000 description 4
- 101150089655 Ins2 gene Proteins 0.000 description 4
- 101100072652 Xenopus laevis ins-b gene Proteins 0.000 description 4
- 150000004767 nitrides Chemical class 0.000 description 4
- 230000004888 barrier function Effects 0.000 description 3
- 238000005229 chemical vapour deposition Methods 0.000 description 3
- 239000004020 conductor Substances 0.000 description 3
- 238000010586 diagram Methods 0.000 description 3
- 239000000463 material Substances 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 2
- 229910052802 copper Inorganic materials 0.000 description 2
- 230000005669 field effect Effects 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 229910052759 nickel Inorganic materials 0.000 description 2
- 229910052697 platinum Inorganic materials 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 238000004544 sputter deposition Methods 0.000 description 2
- 229910052719 titanium Inorganic materials 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 1
- 101710178035 Chorismate synthase 2 Proteins 0.000 description 1
- 101710152694 Cysteine synthase 2 Proteins 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 1
- 230000015556 catabolic process Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02697—Forming conducting materials on a substrate
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- H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
- H01L23/4824—Pads with extended contours, e.g. grid structure, branch structure, finger structure
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- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
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- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0207—Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
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Abstract
【解決手段】基板には、トランジスタ及びダイオードが形成されている。トランジスタとダイオードは第1方向に並んでいる。基板には、さらに第1配線、第1分岐配線、及び第2分岐配線が形成されている。第1配線は、トランジスタとダイオードの間を延在している。第1分岐配線は第1配線からトランジスタと重なる方向に延在し、トランジスタに接続している。第2分岐配線は第1配線からダイオードと重なる方向に延在し、ダイオードに接続している。
【選択図】図2
Description
図1は、第1の実施形態に係る電気機器EDの回路図である。電気機器EDは、スイッチング電源であり、交流電力を直流電力に変換する。電気機器EDは、ダイオードブリッジDB、インダクタIND、トランジスタTR、ダイオードDD、及びコンダクタCONを有している。
図11は、第2の実施形態に係る半導体装置SDの平面図であり、第1の実施形態の図7に対応している。図12は、図11に示した半導体装置SDが有する半導体チップSCの平面図である。図13は、本実施形態における半導体チップSCの断面図であり、第1の実施形態の図5に対応している。なお、図12において、説明のため、後述するダイオードアノードバス配線DABL及びカソードバス配線CBLは点線で示されている。本実施形態に係る半導体装置SDは、以下の点を除いて、第1の実施形態に係る半導体装置SDと同様の構成である。
BCON 埋込コンタクト
BF バッファ層
BL1 ボンディングリボン
BL2 ボンディングリボン
BSUB ベース基板
BW1 ボンディングワイヤ
BW2 ボンディングワイヤ
BW3 ボンディングワイヤ
CBL カソードバス配線
CBT 変換器
CE カソード電極
CL カソード配線
CND コンダクタ
CON1 コンタクト
CON2 コンタクト
DABL ダイオードアノードバス配線
DAL ドレインアノード配線
DB ダイオードブリッジ
DD ダイオード
DDR ダイオード領域
DE ドレイン電極
DP チップ搭載部
ED 電気機器
GE ゲート電極
GINS ゲート絶縁膜
GL ゲート配線
GP ゲートパッド
IND インダクタ
INSL1 絶縁膜
INSL2 層間絶縁膜
LT1 第1端子
LT2 第2端子
LT3 第3端子
SC 半導体チップ
SD 半導体装置
SE ソース電極
SEM 第1導電型層
SL ソース配線
SPI 絶縁分離層
STM ショットキー金属
SUB 基板
TR トランジスタ
TRR トランジスタ領域
図1は、第1の実施形態に係る電気機器EDの回路図である。電気機器EDは、スイッチング電源であり、交流電力を直流電力に変換する。電気機器EDは、ダイオードブリッジDB、インダクタIND、トランジスタTR、ダイオードDD、及びキャパシタCPを有している。
BCON 埋込コンタクト
BUF バッファ層
BL1 ボンディングリボン
BL2 ボンディングリボン
BSUB ベース基板
BW1 ボンディングワイヤ
BW2 ボンディングワイヤ
BW3 ボンディングワイヤ
CBL カソードバス配線
CBT 変換器
CE カソード電極
CL カソード配線
CND コンダクタ
CON1 コンタクト
CON2 コンタクト
DABL ダイオードアノードバス配線
DAL ドレインアノード配線
DB ダイオードブリッジ
DD ダイオード
DDR ダイオード領域
DE ドレイン電極
DP チップ搭載部
ED 電気機器
GE ゲート電極
GINS ゲート絶縁膜
GL ゲート配線
GP ゲートパッド
IND インダクタ
INSL1 絶縁膜
INSL2 層間絶縁膜
LT1 第1端子
LT2 第2端子
LT3 第3端子
SC 半導体チップ
SD 半導体装置
SE ソース電極
SEM 第1導電型層
SL ソース配線
SPI 絶縁分離層
STM ショットキー金属
SUB 基板
TR トランジスタ
TRR トランジスタ領域
Claims (8)
- 基板と、
前記基板を用いて形成されたトランジスタと、
前記基板を用いて形成されたダイオードと、
を備え、
前記トランジスタと前記ダイオードは、第1方向に並んでおり、
さらに、
前記基板上に形成され、前記トランジスタと前記ダイオードの間を延在する第1配線と、
前記第1配線から前記トランジスタと重なる方向に延在し、前記トランジスタに接続する第1分岐配線と、
前記第1配線から前記ダイオードと重なる方向に延在し、前記ダイオードに接続する第2分岐配線と、
を備える半導体装置。 - 請求項1に記載の半導体装置において、
前記トランジスタのドレイン及びソースが、前記第1配線に沿う方向に交互に設けられており、
複数の前記第1分岐配線が、互いに離間して設けられており、
前記ダイオードのアノード及びカソードが、前記第1配線に沿う方向に交互に設けられており、
複数の前記第2分岐配線が、互いに離間して設けられている半導体装置。 - 請求項2に記載の半導体装置において、
前記トランジスタを介して前記第1配線とは逆側に配置されており、前記第1配線と同一の方向に延在する第2配線と、
前記第2配線から前記トランジスタと重なる方向に延在して前記トランジスタに接続し、かつ前記第1分岐配線に対向する第3分岐配線と、
前記ダイオードを介して前記第1配線とは逆側に配置されており、前記第1配線と同一の方向に延在する第3配線と、
前記第3配線から前記ダイオードと重なる方向に延在して前記ダイオードに接続し、かつ前記第2分岐配線に対向する第4分岐配線と、
を備える半導体装置。 - 請求項3に記載の半導体装置において、
前記第1分岐配線は前記トランジスタの前記ドレインに接続しており、
前記第3分岐配線は前記トランジスタの前記ソースに接続しており、
前記第2分岐配線は前記ダイオードの前記アノードに接続しており、
前記第4分岐配線は前記ダイオードの前記カソードに接続している半導体装置。 - 請求項3に記載の半導体装置において、
前記第1方向に、前記第2配線、前記トランジスタ、前記第1配線、前記ダイオード、前記第3配線、前記ダイオード、前記第1配線、及び前記トランジスタが、繰り返しこの順に配置されており、
前記第3配線の2つの側面のそれぞれから前記第4分岐配線が延在している半導体装置。 - 請求項3に記載の半導体装置において、
前記基板は矩形であり、
前記基板の第1辺及び前記第1辺に対向する第2辺は、前記第1方向に延在しており、
前記基板の前記第1辺に対向する第1リード端子と、
前記基板の前記第2辺に対向する第2リード端子と、
前記第1配線を前記第1リード端子に接続する第1接続部材と、
前記第3配線を前記第2リード端子に接続する第2接続部材と、
を備える半導体装置。 - 請求項6に記載の半導体装置において、
前記基板の前記第2辺に沿って形成され、前記トランジスタのゲート電極に接続するゲート配線と、
前記基板の前記第2辺に対向する第3リード端子と、
前記ゲート配線を前記第3リード端子に接続する第3接続部材と、
を備える半導体装置。 - 請求項6に記載の半導体装置において、
前記基板は、
不純物が導入されていて、第1面、及び前記第1面とは逆側の面である第2面を有する半導体基板と、
前記半導体基板の前記第1面に形成された化合物半導体層と、
前記化合物半導体層に埋め込まれ、下部が前記半導体基板に接続しており、上面が前記第2配線に接続している埋込コンタクトと、
を備え、
さらに、前記半導体基板の前記第2面を支持する基板搭載部を備え、
前記基板搭載部の少なくとも前記第2面に接する面は、導電性を有している半導体装置。
Priority Applications (7)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2014140188A JP6347685B2 (ja) | 2014-07-08 | 2014-07-08 | 半導体装置 |
EP15171846.7A EP2966682A1 (en) | 2014-07-08 | 2015-06-12 | Semiconductor device |
US14/752,880 US9691757B2 (en) | 2014-07-08 | 2015-06-27 | Semiconductor device including transistors and diodes and a first line extending between the transistors and diodes |
TW104121248A TWI634637B (zh) | 2014-07-08 | 2015-07-01 | 半導體裝置 |
KR1020150095344A KR20160006117A (ko) | 2014-07-08 | 2015-07-03 | 반도체 장치 |
CN201510394333.1A CN105261562B (zh) | 2014-07-08 | 2015-07-07 | 半导体器件 |
US15/610,329 US20170271326A1 (en) | 2014-07-08 | 2017-05-31 | Semiconductor device |
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Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2014140188A JP6347685B2 (ja) | 2014-07-08 | 2014-07-08 | 半導体装置 |
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JP2016018871A true JP2016018871A (ja) | 2016-02-01 |
JP6347685B2 JP6347685B2 (ja) | 2018-06-27 |
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JP2014140188A Active JP6347685B2 (ja) | 2014-07-08 | 2014-07-08 | 半導体装置 |
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US (2) | US9691757B2 (ja) |
EP (1) | EP2966682A1 (ja) |
JP (1) | JP6347685B2 (ja) |
KR (1) | KR20160006117A (ja) |
CN (1) | CN105261562B (ja) |
TW (1) | TWI634637B (ja) |
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---|---|---|---|---|
WO2014048504A1 (de) * | 2012-09-28 | 2014-04-03 | Fraunhofer-Gesellschaft zur Förderung der angewandten Forschung e.V. | Halbleiterbauelement mit mindestens einer kontaktstruktur zum zuführen und/oder abführen von ladungsträgern |
JP6347685B2 (ja) * | 2014-07-08 | 2018-06-27 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
US9537338B2 (en) | 2014-09-16 | 2017-01-03 | Navitas Semiconductor Inc. | Level shift and inverter circuits for GaN devices |
US9571093B2 (en) | 2014-09-16 | 2017-02-14 | Navitas Semiconductor, Inc. | Half bridge driver circuits |
US9960154B2 (en) | 2014-09-19 | 2018-05-01 | Navitas Semiconductor, Inc. | GaN structures |
US9831867B1 (en) | 2016-02-22 | 2017-11-28 | Navitas Semiconductor, Inc. | Half bridge driver circuits |
US10134658B2 (en) * | 2016-08-10 | 2018-11-20 | Macom Technology Solutions Holdings, Inc. | High power transistors |
US9935187B1 (en) * | 2017-03-31 | 2018-04-03 | Teresa Oh | Ambipolar transistor and leakage current cutoff device using the same |
CN110518074B (zh) * | 2019-07-23 | 2021-02-02 | 西安电子科技大学 | 阴阳极交替的大电流GaN肖特基二极管及其制作方法 |
US11769807B2 (en) * | 2020-08-03 | 2023-09-26 | Semiconductor Components Industries, Llc | Lateral transistor with extended source finger contact |
US20220165726A1 (en) * | 2020-11-26 | 2022-05-26 | Innolux Corporation | Electronic device |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20110220978A1 (en) * | 2010-03-10 | 2011-09-15 | Kabushiki Kaisha Toshiba | Semiconductor device |
US20130062625A1 (en) * | 2011-09-08 | 2013-03-14 | Kabushiki Kaisha Toshiba | Semiconductor device |
US20130248931A1 (en) * | 2012-03-23 | 2013-09-26 | Kabushiki Kaisha Toshiba | Nitride semiconductor device |
JP2014036115A (ja) * | 2012-08-08 | 2014-02-24 | Renesas Electronics Corp | 半導体装置 |
JP2014087148A (ja) * | 2012-10-23 | 2014-05-12 | Renesas Electronics Corp | 半導体装置 |
WO2015083887A1 (en) * | 2013-12-02 | 2015-06-11 | Lg Innotek Co., Ltd. | Semiconductor device and semiconductor circuit including the device |
Family Cites Families (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7071514B1 (en) * | 2004-12-02 | 2006-07-04 | Anadigics, Inc. | Electrostatic discharge protection device |
JP4995455B2 (ja) * | 2005-11-30 | 2012-08-08 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
JP4720756B2 (ja) * | 2007-02-22 | 2011-07-13 | トヨタ自動車株式会社 | 半導体電力変換装置およびその製造方法 |
WO2010081530A1 (de) * | 2009-01-07 | 2010-07-22 | Microgan Gmbh | Selbstsperrender schalter |
JP4700125B2 (ja) * | 2009-07-30 | 2011-06-15 | 住友電気工業株式会社 | 半導体装置およびその製造方法 |
US9153570B2 (en) * | 2010-02-25 | 2015-10-06 | Macronix International Co., Ltd. | ESD tolerant I/O pad circuit including a surrounding well |
US20110266624A1 (en) * | 2010-04-30 | 2011-11-03 | Texas Instruments Incorporated | Electrostatic discharge protection having multiply segmented diodes in proximity to transistor |
JP6347685B2 (ja) * | 2014-07-08 | 2018-06-27 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
-
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Patent Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US20110220978A1 (en) * | 2010-03-10 | 2011-09-15 | Kabushiki Kaisha Toshiba | Semiconductor device |
JP2011187840A (ja) * | 2010-03-10 | 2011-09-22 | Toshiba Corp | 半導体装置 |
US20130062625A1 (en) * | 2011-09-08 | 2013-03-14 | Kabushiki Kaisha Toshiba | Semiconductor device |
JP2013058640A (ja) * | 2011-09-08 | 2013-03-28 | Toshiba Corp | 半導体装置 |
US20130248931A1 (en) * | 2012-03-23 | 2013-09-26 | Kabushiki Kaisha Toshiba | Nitride semiconductor device |
JP2013201242A (ja) * | 2012-03-23 | 2013-10-03 | Toshiba Corp | 窒化物半導体素子 |
JP2014036115A (ja) * | 2012-08-08 | 2014-02-24 | Renesas Electronics Corp | 半導体装置 |
JP2014087148A (ja) * | 2012-10-23 | 2014-05-12 | Renesas Electronics Corp | 半導体装置 |
WO2015083887A1 (en) * | 2013-12-02 | 2015-06-11 | Lg Innotek Co., Ltd. | Semiconductor device and semiconductor circuit including the device |
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TWI634637B (zh) | 2018-09-01 |
JP6347685B2 (ja) | 2018-06-27 |
KR20160006117A (ko) | 2016-01-18 |
CN105261562B (zh) | 2019-08-13 |
US9691757B2 (en) | 2017-06-27 |
US20170271326A1 (en) | 2017-09-21 |
CN105261562A (zh) | 2016-01-20 |
EP2966682A1 (en) | 2016-01-13 |
TW201613058A (en) | 2016-04-01 |
US20160013179A1 (en) | 2016-01-14 |
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