JP2015520949A5 - - Google Patents

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Publication number
JP2015520949A5
JP2015520949A5 JP2015511714A JP2015511714A JP2015520949A5 JP 2015520949 A5 JP2015520949 A5 JP 2015520949A5 JP 2015511714 A JP2015511714 A JP 2015511714A JP 2015511714 A JP2015511714 A JP 2015511714A JP 2015520949 A5 JP2015520949 A5 JP 2015520949A5
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JP
Japan
Prior art keywords
spin
layer
ferromagnetic
transistor
ferromagnetic layer
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JP2015511714A
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English (en)
Japanese (ja)
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JP5902349B2 (ja
JP2015520949A (ja
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Priority claimed from US13/746,011 external-priority patent/US9076953B2/en
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Publication of JP2015520949A publication Critical patent/JP2015520949A/ja
Publication of JP2015520949A5 publication Critical patent/JP2015520949A5/ja
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Publication of JP5902349B2 publication Critical patent/JP5902349B2/ja
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JP2015511714A 2012-05-09 2013-05-09 圧電層と関連するメモリ、メモリシステム、および方法を用いるスピントランジスタ Active JP5902349B2 (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201261644592P 2012-05-09 2012-05-09
US61/644,592 2012-05-09
US13/746,011 US9076953B2 (en) 2012-05-09 2013-01-21 Spin transistors employing a piezoelectric layer and related memory, memory systems, and methods
US13/746,011 2013-01-21
PCT/US2013/040406 WO2013170070A2 (en) 2012-05-09 2013-05-09 Spin transistors employing a piezoelectric layer and related memory, memory systems, and methods

Publications (3)

Publication Number Publication Date
JP2015520949A JP2015520949A (ja) 2015-07-23
JP2015520949A5 true JP2015520949A5 (enExample) 2015-10-01
JP5902349B2 JP5902349B2 (ja) 2016-04-13

Family

ID=49547976

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2015511714A Active JP5902349B2 (ja) 2012-05-09 2013-05-09 圧電層と関連するメモリ、メモリシステム、および方法を用いるスピントランジスタ

Country Status (6)

Country Link
US (1) US9076953B2 (enExample)
EP (1) EP2847806B1 (enExample)
JP (1) JP5902349B2 (enExample)
KR (1) KR101613199B1 (enExample)
CN (1) CN104303326B (enExample)
WO (1) WO2013170070A2 (enExample)

Families Citing this family (15)

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Publication number Priority date Publication date Assignee Title
KR20130017267A (ko) * 2011-08-10 2013-02-20 에스케이하이닉스 주식회사 반도체 장치 및 그 제조 방법
WO2015137256A1 (ja) * 2014-03-14 2015-09-17 独立行政法人科学技術振興機構 ピエゾ抵抗体をチャネルに用いたトランジスタおよび電子回路
US10263036B2 (en) * 2014-09-25 2019-04-16 Intel Corporation Strain assisted spin torque switching spin transfer torque memory
JP6824504B2 (ja) 2015-03-06 2021-02-03 株式会社BlueSpin 磁気メモリ、磁気メモリへのデータ書き込み方法及び半導体装置
JP2016194964A (ja) 2015-04-01 2016-11-17 株式会社BlueSpin 磁気メモリ及びその動作方法
CN113694075A (zh) * 2015-06-10 2021-11-26 得克萨斯州大学系统董事会 用于医治疾病的外泌体的用途
US9825218B2 (en) 2015-10-13 2017-11-21 Board Of Regents, The University Of Texas System Transistor that employs collective magnetic effects thereby providing improved energy efficiency
CN109690675B (zh) * 2016-06-28 2022-11-04 赢世通股份有限公司 一种可应用于磁电隧道结的新型字线脉冲写入方法
GB2560936A (en) * 2017-03-29 2018-10-03 Univ Warwick Spin electronic device
CN108344956B (zh) * 2018-01-23 2020-06-12 湖北工业大学 基于自激励单电子自旋电磁晶体管的应用电路
CN109449284B (zh) * 2018-09-17 2019-06-28 北京应用物理与计算数学研究所 一种基于挠曲机制的三碘化铬电流自旋控制器
CN109346599A (zh) * 2018-09-26 2019-02-15 中国科学技术大学 多铁隧道结忆阻器及其制作方法
US12080783B2 (en) * 2020-03-05 2024-09-03 Wisconsin Alumni Research Foundation Spin transistors based on voltage-controlled magnon transport in multiferroic antiferromagnets
CN113611795B (zh) * 2021-06-15 2023-09-26 北京航空航天大学 垂直结构堆叠的磁旋逻辑器件及实现信息存取的方法
US20250126851A1 (en) * 2022-07-05 2025-04-17 The Penn State Research Foundation An ultra-steep slope and high-performance strain effect transistor

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6829157B2 (en) 2001-12-05 2004-12-07 Korea Institute Of Science And Technology Method of controlling magnetization easy axis in ferromagnetic films using voltage, ultrahigh-density, low power, nonvolatile magnetic memory using the control method, and method of writing information on the magnetic memory
US7282755B2 (en) 2003-11-14 2007-10-16 Grandis, Inc. Stress assisted current driven switching for magnetic memory applications
KR100754930B1 (ko) 2004-12-22 2007-09-03 한국과학기술원 전압제어 자화반전 기록방식의 mram 소자 및 이를이용한 정보의 기록 및 판독 방법
JP2006237304A (ja) * 2005-02-25 2006-09-07 Osaka Industrial Promotion Organization 強磁性伝導体材料およびその製造方法、並びに磁気抵抗素子、電界効果トランジスタ
JP4574674B2 (ja) * 2005-03-24 2010-11-04 独立行政法人科学技術振興機構 論理回路および単電子スピントランジスタ
JP4528660B2 (ja) * 2005-03-31 2010-08-18 株式会社東芝 スピン注入fet
JP4455558B2 (ja) * 2006-09-08 2010-04-21 株式会社東芝 スピンmosfet
JP4996390B2 (ja) * 2007-08-28 2012-08-08 株式会社東芝 スピンfet及び磁気抵抗効果素子
US7791152B2 (en) * 2008-05-12 2010-09-07 International Business Machines Corporation Magnetic tunnel junction transistor
US8054677B2 (en) * 2008-08-07 2011-11-08 Seagate Technology Llc Magnetic memory with strain-assisted exchange coupling switch
US8310861B2 (en) 2008-09-30 2012-11-13 Micron Technology, Inc. STT-MRAM cell structure incorporating piezoelectric stress material

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