JP2015507372A5 - - Google Patents
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- Publication number
- JP2015507372A5 JP2015507372A5 JP2014556545A JP2014556545A JP2015507372A5 JP 2015507372 A5 JP2015507372 A5 JP 2015507372A5 JP 2014556545 A JP2014556545 A JP 2014556545A JP 2014556545 A JP2014556545 A JP 2014556545A JP 2015507372 A5 JP2015507372 A5 JP 2015507372A5
- Authority
- JP
- Japan
- Prior art keywords
- interposer
- die
- integrated circuit
- circuit die
- assemblies
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000000712 assembly Effects 0.000 claims 14
- 238000000429 assembly Methods 0.000 claims 14
- 238000000034 method Methods 0.000 claims 7
- 239000005022 packaging material Substances 0.000 claims 3
- 239000000758 substrate Substances 0.000 claims 2
- 230000002457 bidirectional effect Effects 0.000 claims 1
- 238000001459 lithography Methods 0.000 claims 1
- 239000002184 metal Substances 0.000 claims 1
- 238000000465 moulding Methods 0.000 claims 1
- 230000004044 response Effects 0.000 claims 1
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US13/369,215 | 2012-02-08 | ||
| US13/369,215 US8704364B2 (en) | 2012-02-08 | 2012-02-08 | Reducing stress in multi-die integrated circuit structures |
| US13/399,939 | 2012-02-17 | ||
| US13/399,939 US8704384B2 (en) | 2012-02-17 | 2012-02-17 | Stacked die assembly |
| PCT/US2012/067543 WO2013119309A1 (en) | 2012-02-08 | 2012-12-03 | Stacked die assembly with multiple interposers |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2015507372A JP2015507372A (ja) | 2015-03-05 |
| JP2015507372A5 true JP2015507372A5 (https=) | 2015-12-24 |
| JP5916898B2 JP5916898B2 (ja) | 2016-05-11 |
Family
ID=47563594
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2014556545A Active JP5916898B2 (ja) | 2012-02-08 | 2012-12-03 | 複数のインターポーザを伴うスタックドダイアセンブリ |
Country Status (5)
| Country | Link |
|---|---|
| EP (1) | EP2812919B1 (https=) |
| JP (1) | JP5916898B2 (https=) |
| KR (1) | KR101891862B1 (https=) |
| CN (1) | CN104471708B (https=) |
| WO (1) | WO2013119309A1 (https=) |
Families Citing this family (40)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20140138815A1 (en) * | 2012-11-20 | 2014-05-22 | Nvidia Corporation | Server processing module |
| US20150221614A1 (en) * | 2014-02-06 | 2015-08-06 | Sehat Sutardja | High-bandwidth dram using interposer and stacking |
| US20150279431A1 (en) | 2014-04-01 | 2015-10-01 | Micron Technology, Inc. | Stacked semiconductor die assemblies with partitioned logic and associated systems and methods |
| US9402312B2 (en) | 2014-05-12 | 2016-07-26 | Invensas Corporation | Circuit assemblies with multiple interposer substrates, and methods of fabrication |
| US9666559B2 (en) | 2014-09-05 | 2017-05-30 | Invensas Corporation | Multichip modules and methods of fabrication |
| US9741620B2 (en) | 2015-06-24 | 2017-08-22 | Invensas Corporation | Structures and methods for reliable packages |
| WO2017136289A2 (en) * | 2016-02-02 | 2017-08-10 | Xilinx, Inc. | Active-by-active programmable device |
| TWI628742B (zh) * | 2016-07-21 | 2018-07-01 | 南亞科技股份有限公司 | 堆疊式封裝結構 |
| WO2018034787A1 (en) * | 2016-08-15 | 2018-02-22 | Xilinx, Inc. | Standalone interface for stacked silicon interconnect (ssi) technology integration |
| US10784121B2 (en) | 2016-08-15 | 2020-09-22 | Xilinx, Inc. | Standalone interface for stacked silicon interconnect (SSI) technology integration |
| US10141938B2 (en) * | 2016-09-21 | 2018-11-27 | Xilinx, Inc. | Stacked columnar integrated circuits |
| US11183458B2 (en) | 2016-11-30 | 2021-11-23 | Shenzhen Xiuyuan Electronic Technology Co., Ltd | Integrated circuit packaging structure and method |
| US12341096B2 (en) | 2016-12-29 | 2025-06-24 | Intel Corporation | Bare-die smart bridge connected with copper pillars for system-in-package apparatus |
| KR102653238B1 (ko) * | 2016-12-29 | 2024-03-29 | 인텔 코포레이션 | 시스템 인 패키지 장치를 위해 구리 필러와 연결된 베어 다이 스마트 브리지 |
| US12424531B2 (en) | 2017-03-14 | 2025-09-23 | Mediatek Inc. | Semiconductor package structure |
| US11264337B2 (en) | 2017-03-14 | 2022-03-01 | Mediatek Inc. | Semiconductor package structure |
| US10784211B2 (en) | 2017-03-14 | 2020-09-22 | Mediatek Inc. | Semiconductor package structure |
| US11362044B2 (en) | 2017-03-14 | 2022-06-14 | Mediatek Inc. | Semiconductor package structure |
| US11171113B2 (en) | 2017-03-14 | 2021-11-09 | Mediatek Inc. | Semiconductor package structure having an annular frame with truncated corners |
| US11387176B2 (en) | 2017-03-14 | 2022-07-12 | Mediatek Inc. | Semiconductor package structure |
| CN116884452A (zh) * | 2017-06-02 | 2023-10-13 | 超极存储器股份有限公司 | 运算处理装置 |
| US10497689B2 (en) * | 2017-08-04 | 2019-12-03 | Mediatek Inc. | Semiconductor package assembly and method for forming the same |
| KR102498883B1 (ko) * | 2018-01-31 | 2023-02-13 | 삼성전자주식회사 | 전류를 분산시키는 관통 전극들을 포함하는 반도체 장치 |
| US11652060B2 (en) | 2018-12-28 | 2023-05-16 | Intel Corporation | Die interconnection scheme for providing a high yielding process for high performance microprocessors |
| CN118448360A (zh) * | 2019-03-14 | 2024-08-06 | 联发科技股份有限公司 | 半导体封装结构 |
| KR102679095B1 (ko) * | 2019-05-30 | 2024-07-01 | 삼성전자주식회사 | 반도체 패키지 |
| US11735533B2 (en) | 2019-06-11 | 2023-08-22 | Intel Corporation | Heterogeneous nested interposer package for IC chips |
| US12080643B2 (en) * | 2019-09-26 | 2024-09-03 | Intel Corporation | Integrated circuit structures having differentiated interconnect lines in a same dielectric layer |
| DE102021104688A1 (de) | 2020-04-30 | 2021-11-04 | Taiwan Semiconductor Manufacturing Co., Ltd. | Stromverteilungsstruktur und verfahren |
| US12255148B2 (en) * | 2020-04-30 | 2025-03-18 | Taiwan Semiconductor Manufacturing Company, Ltd. | Power distribution structure and method |
| CN111863780A (zh) * | 2020-07-17 | 2020-10-30 | 北京灵汐科技有限公司 | 封装结构及电子设备 |
| KR20220022242A (ko) | 2020-08-18 | 2022-02-25 | 삼성전자주식회사 | 회로 기판 모듈 및 이를 포함하는 전자 장치 |
| JP7795724B2 (ja) * | 2021-02-05 | 2026-01-08 | 大日本印刷株式会社 | 半導体パッケージ及び半導体パッケージの製造方法並びにインターポーザ群 |
| US11862481B2 (en) | 2021-03-09 | 2024-01-02 | Apple Inc. | Seal ring designs supporting efficient die to die routing |
| US20220320042A1 (en) * | 2021-03-30 | 2022-10-06 | Advanced Micro Devices, Inc. | Die stacking for modular parallel processors |
| CN114242669B (zh) * | 2022-02-28 | 2022-07-08 | 甬矽电子(宁波)股份有限公司 | 堆叠封装结构和堆叠结构封装方法 |
| EP4487327A1 (en) * | 2022-03-01 | 2025-01-08 | Graphcore Limited | Dram module with data routing logic |
| US12543594B2 (en) * | 2022-04-29 | 2026-02-03 | Intel Corporation | Scalable package architecture using reticle stitching and photonics for integrated circuits |
| CN114899185B (zh) * | 2022-07-12 | 2022-12-02 | 之江实验室 | 一种适用于晶圆级异质异构芯粒的集成结构和集成方法 |
| CN116775555B (zh) * | 2023-06-27 | 2025-03-18 | 无锡中微亿芯有限公司 | 一种具有高存储带宽的多裸片存算架构fpga |
Family Cites Families (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4074342A (en) * | 1974-12-20 | 1978-02-14 | International Business Machines Corporation | Electrical package for lsi devices and assembly process therefor |
| US5672546A (en) * | 1995-12-04 | 1997-09-30 | General Electric Company | Semiconductor interconnect method and structure for high temperature applications |
| WO2002082540A1 (en) * | 2001-03-30 | 2002-10-17 | Fujitsu Limited | Semiconductor device, method of manufacture thereof, and semiconductor substrate |
| JP2002353398A (ja) * | 2001-05-25 | 2002-12-06 | Nec Kyushu Ltd | 半導体装置 |
| JP4380130B2 (ja) * | 2002-09-13 | 2009-12-09 | ソニー株式会社 | 半導体装置 |
| JP4419049B2 (ja) * | 2003-04-21 | 2010-02-24 | エルピーダメモリ株式会社 | メモリモジュール及びメモリシステム |
| JP4343044B2 (ja) * | 2004-06-30 | 2009-10-14 | 新光電気工業株式会社 | インターポーザ及びその製造方法並びに半導体装置 |
| JP4581768B2 (ja) * | 2005-03-16 | 2010-11-17 | ソニー株式会社 | 半導体装置の製造方法 |
| JP2008294423A (ja) * | 2007-04-24 | 2008-12-04 | Nec Electronics Corp | 半導体装置 |
| JP2009135397A (ja) * | 2007-10-31 | 2009-06-18 | Panasonic Corp | 半導体装置 |
| US8064224B2 (en) * | 2008-03-31 | 2011-11-22 | Intel Corporation | Microelectronic package containing silicon patches for high density interconnects, and method of manufacturing same |
| US8008764B2 (en) * | 2008-04-28 | 2011-08-30 | International Business Machines Corporation | Bridges for interconnecting interposers in multi-chip integrated circuits |
| US7936060B2 (en) * | 2009-04-29 | 2011-05-03 | International Business Machines Corporation | Reworkable electronic device assembly and method |
| JPWO2011030504A1 (ja) * | 2009-09-11 | 2013-02-04 | パナソニック株式会社 | 電子部品実装体及びその製造方法並びにインタポーザ |
| JP4649531B1 (ja) * | 2009-12-08 | 2011-03-09 | 新光電気工業株式会社 | 電子装置の切断方法 |
-
2012
- 2012-12-03 KR KR1020147025005A patent/KR101891862B1/ko active Active
- 2012-12-03 JP JP2014556545A patent/JP5916898B2/ja active Active
- 2012-12-03 WO PCT/US2012/067543 patent/WO2013119309A1/en not_active Ceased
- 2012-12-03 EP EP12816386.2A patent/EP2812919B1/en active Active
- 2012-12-03 CN CN201280069303.8A patent/CN104471708B/zh active Active
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