JP2015106713A - 誘電性複合体構造の作製方法及び装置 - Google Patents
誘電性複合体構造の作製方法及び装置 Download PDFInfo
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- JP2015106713A JP2015106713A JP2014236852A JP2014236852A JP2015106713A JP 2015106713 A JP2015106713 A JP 2015106713A JP 2014236852 A JP2014236852 A JP 2014236852A JP 2014236852 A JP2014236852 A JP 2014236852A JP 2015106713 A JP2015106713 A JP 2015106713A
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Abstract
【解決手段】誘電性複合体構造は、1又は複数のリーク遮蔽層LBLと、1又は複数の、ラミネート誘電体層LDL、アロイ誘電体層ADL又は共堆積誘電体層CDLとが交互に配置された構造を有し、かつ、前記ラミネート誘電体層LDL、前記アロイ誘電体層ADL及び前記共堆積誘電体層CDLの各層は、それぞれベース誘電体層BDLに組み入れられたドーパントを含む。LDLはラミネート法によりBDLにドーピング層を組み入れることにより、ADLは合金化法によりBDLにドーパントを組み入れることにより、CDLは共堆積法によりBDLベース材料とドーパントを共にパルスすることにより形成される。
【選択図】図1
Description
・HfO2又はZrO2の単独の誘電率よりも大きい誘電率
・HfO2又はZrO2の単独のリーク電流と同等か又はより低いリーク電流
・HfO2又はZrO2の単独の破壊電圧と同等か又はより高い破壊電圧
・HfO2又はZrO2の単独のステップカバレッジと同等か又はより良好なステップカバレッジ
20 プロセス
22 BDL形成プロセス
24 ドープ誘電体層形成プロセス
26 LBL形成プロセス
200 コントローラ
Claims (21)
- 基板と、前記基板の表面上に形成された誘電性複合体構造と、を有する半導体デバイスであって、前記誘電性複合体構造は、1又は複数のリーク遮蔽層(LBL)と、1又は複数の、ラミネート誘電体層(LDL)、アロイ誘電体層(ADL)又は共堆積誘電体層(CDL)とが交互に配置された構造を有し、かつ、前記ラミネート誘電体層(LDL)、前記アロイ誘電体層(ADL)及び前記共堆積誘電体層(CDL)の各層は、それぞれベース誘電体層(BDL)に組み入れられたドーパントを含むことを特徴とする半導体デバイス。
- 前記リーク遮蔽層(LBL)と、前記ラミネート誘電体層(LDL)、前記アロイ誘電体層(ADL)又は前記共堆積誘電体層(CDL)との各対における、該ラミネート誘電体層(LDL)、該アロイ誘電体層(ADL)及び該共堆積誘電体層(CDL)の各層の厚さ及びドーピング濃度が同じであるか又は異なっており、かつ、ドーピング層又はドーパントが、厚さ0.5〜200nmの前記ベース誘電体層(BDL)に対しドーピング濃度0.5〜50%で組み入れられることを特徴とする請求項1に記載の半導体デバイス。
- 前記ラミネート誘電体層(LDL)、前記アロイ誘電体(ADL)層及び前記共堆積誘電体層(CDL)の各層の厚さが同じであるか又は異なっており、その厚さは0.1〜100nmの範囲内であることを特徴とする請求項2に記載の半導体デバイス。
- 前記誘電性複合体構造が、ベース誘電体材料、ドーパント及びリーク遮蔽材料を含み、かつ、前記ベース誘電体材料が、ZrO2と、HfO2と、ZrO2/HfO2混合物の複合体とからなる群のうちの1又は複数を含むことを特徴とする請求項1に記載の半導体デバイス。
- 前記ドーパントが、ランタナイド金属と、III(B)族、IV(B)族及びV(B)族の金属と、III(B)族、IV(B)族及びV(B)族の金属の酸化物とからなる群のうちの1又は複数を含むことを特徴とする請求項1に記載の半導体デバイス。
- 前記誘電性複合体構造のリーク遮蔽材料が、SiO2と、Al2O3とからなる群のうちの1又は複数を含むことを特徴とする請求項1に記載の半導体デバイス。
- 基板表面上に誘電性複合体構造を形成する方法であって、
1又は複数のリーク遮蔽層(LBL)と、1又は複数の、ラミネート誘電体層(LDL)、アロイ誘電体層(ADL)又は共堆積誘電体層(CDL)とが交互に配置されるように形成するステップを有し、かつ、
前記ラミネート誘電体層(LDL)、前記アロイ誘電体層(ADL)及び前記共堆積誘電体層(CDL)の各層は、それぞれベース誘電体層(BDL)に組み入れられたドーパントを含み、
前記ラミネート誘電体層(LDL)は、ラミネート法を用いて前記ベース誘電体層(BDL)にドーピング層を組み入れることにより形成され、
前記アロイ誘電体層(ADL)は、合金化法を用いて前記ベース誘電体層(BDL)にドーパントを組み入れることにより形成され、
前記共堆積誘電体層(CDL)は、共堆積法を用いて前記ベース誘電体層(BDL)のベース材料とドーパントを共にパルスすることにより形成されることを特徴とする
誘電性複合体構造の形成方法。 - 前記誘電性複合体構造における交互に配置された層群の全ての層群(X、Y)の形成において、単一のドーピング法が用いられることを特徴とする請求項7に記載の誘電性複合体構造の形成方法。
- 前記誘電性複合体構造における交互に配置された層群のうち1つの層群(X)の形成において、複数のドーピング法の組合せを用いることを特徴とする請求項7に記載の誘電性複合体構造の形成方法。
- 前記誘電性複合体構造における交互に配置された層群のうち1つの層群(X)と別の層群(Y)の形成において、複数のドーピング法の組合せが異なることを特徴とする請求項9に記載の誘電性複合体構造の形成方法。
- 前記誘電性複合体構造における交互に配置された層群が、中央に位置する前記ラミネート誘電体層(LDL)、前記アロイ誘電体層(ADL)又は前記共堆積誘電体層(CDL)について対称であることを特徴とする請求項7に記載の誘電性複合体構造の形成方法。
- 前記誘電性複合体構造における交互に配置された層群が、中央に位置する前記ラミネート誘電体層(LDL)、前記アロイ誘電体層(ADL)又は前記共堆積誘電体層(CDL)について非対称であることを特徴とする請求項7に記載の誘電性複合体構造の形成方法。
- 誘電性複合体構造を作製するための原子層エピタキシー(ALD)プロセスであって、複数のリーク遮蔽層(LBL)と、1又は複数の、ラミネート誘電体層(LDL)、アロイ誘電体層(ADL)又は共堆積誘電体層(CDL)とが交互に配置するように形成するステップを含み、かつ、前記ラミネート誘電体層(LDL)、前記アロイ誘電体層(ADL)及び前記共堆積誘電体層(CDL)は、ベース誘電体層(BDL)に組み入れられたドーパントを含むことを特徴とする原子層エピタキシープロセス。
- 前記ベース誘電体層(BDL)の各々が、
(a)ベース金属プリカーサが堆積される基板を備えたチャンバ内に、ベース金属プリカーサをアルゴン搬送ガスと共にパルス導入するステップと、
(b)前記基板の表面で前記ベース金属プリカーサの自己限界堆積が完了した後、過剰の前記ベース金属プリカーサを前記チャンバからパージするステップと、
(c)オゾン、O2又はH2Oであるオキシダントを前記チャンバ内にパルス導入するステップと、
(d)前記オキシダントを前記チャンバからパージするステップと、
(e)前記ベース誘電体層(BDL)が所望する厚さに到達するまで前記(a)〜(d)のステップを繰り返すステップと、により形成されることを特徴とする
請求項13に記載の原子層エピタキシープロセス。 - 前記ラミネート誘電体層(LDL)の各々が、
(a)ベース金属プリカーサが堆積される基板を備えたチャンバ内に、ベース金属プリカーサをアルゴン搬送ガスと共にパルス導入するステップと、
(b)前記基板の表面で前記ベース金属プリカーサの自己限界堆積が完了した後、過剰の前記ベース金属プリカーサを前記チャンバからパージするステップと、
(c)オゾン、O2又はH2Oであるオキシダントを前記チャンバ内にパルス導入するステップと、
(d)前記オキシダントを前記チャンバからパージするステップと、
(e)ドーパントプリカーサをアルゴン搬送ガスと共に前記チャンバ内にパルス導入するステップと、
(f)前記ベース金属プリカーサ上で前記ドーパントプリカーサの自己限界堆積が完了した後、過剰の前記ドーパントプリカーサを前記チャンバからパージするステップと、
(g)オキシダントを前記チャンバ内にパルス導入するステップと、
(h)前記オキシダントを前記チャンバからパージするステップと、
(i)前記ラミネート誘電体層(LDL)が所望する厚さに到達するまで前記(a)〜(h)のステップを繰り返すステップと、により形成されることを特徴とする
請求項13に記載の原子層エピタキシープロセス。 - 前記アロイ誘電体層(ADL)の各々が、
(a)ベース金属プリカーサが堆積される基板を備えたチャンバ内に、ベース金属プリカーサをアルゴン搬送ガスと共にパルス導入するステップと、
(b)前記基板の表面で前記ベース金属プリカーサの自己限界堆積が完了した後、過剰の前記ベース金属プリカーサを前記チャンバからパージするステップと、
(c)ドーパントプリカーサをアルゴン搬送ガスと共に前記チャンバ内にパルス導入するステップと、
(d)前記ベース金属プリカーサ上で前記ドーパントプリカーサの自己限界堆積が完了した後、過剰の前記ドーパントプリカーサを前記チャンバからパージするステップと、
(e)オキシダントを前記チャンバ内にパルス導入するステップと、
(f)前記オキシダントを前記チャンバからパージするステップと、
(g)前記アロイ誘電体層(ADL)が所望する厚さに到達するまで前記(a)〜(f)のステップを繰り返すステップと、により形成されることを特徴とする
請求項13に記載の原子層エピタキシープロセス。 - 前記共堆積誘電体層(CDL)の各々が、
(a)ベース金属プリカーサ及びドーパントプリカーサが堆積される基板を備えたチャンバ内に、ベース金属プリカーとドーパントプリカーサを共に、アルゴン搬送ガスと共にパルス導入するステップと、
(b)前記基板の表面での混合した前記ベース金属プリカーサ及びドーパントプリカーサの自己限界堆積が完了した後、過剰の前記ベース金属プリカーサ及びドーパントプリカーサを前記チャンバからパージするステップと、
(c)オキシダントを前記チャンバ内にパルス導入するステップと、
(d)前記オキシダントを前記チャンバからパージするステップと、
(e)前記共堆積誘電体層(CDL)が所望する厚さに到達するまで前記(a)〜(d)のステップを繰り返すステップと、により形成されることを特徴とする
請求項13に記載の原子層エピタキシープロセス。 - 前記リーク遮蔽層(LBL)の各々が、
(a)リーク遮蔽プリカーサが堆積される基板を備えたチャンバ内に、リーク遮蔽プリカーサをアルゴン搬送ガスと共にパルス導入するステップと、
(b)前記基板の表面で前記リーク遮蔽プリカーサの自己限界堆積が完了した後、過剰の前記リーク遮蔽プリカーサを前記チャンバからパージするステップと、
(c)オキシダントを前記チャンバ内にパルス導入するステップと、
(d)前記オキシダントを前記チャンバからパージするステップと、
(e)前記リーク遮蔽層(LBL)が所望する厚さに到達するまで前記(a)〜(d)のステップを繰り返すステップと、により形成されることを特徴とする
請求項13に記載の原子層エピタキシープロセス。 - 不活性ガスの存在下、300℃〜900℃の温度にてアニーリングを行う後処理アニーリングにより、前記誘電性複合体構造を結晶学的に安定化させるステップをさらに有することを特徴とする
請求項13に記載の原子層エピタキシープロセス。 - 前記誘電性複合体構造に対し赤外線、可視光線又は紫外線を照射する後処理アニーリングにより、前記誘電性複合体構造を結晶学的に安定化させるステップをさらに有することを特徴とする
請求項13に記載の原子層エピタキシープロセス。 - 前記誘電性複合体構造に対し電子又はイオンを照射する後処理アニーリングにより、前記誘電性複合体構造を結晶学的に安定化させるステップをさらに有することを特徴とする
請求項13に記載の原子層エピタキシープロセス。
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JP2020004985A (ja) | 2020-01-09 |
KR20200133195A (ko) | 2020-11-26 |
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TW201539525A (zh) | 2015-10-16 |
TWI651755B (zh) | 2019-02-21 |
KR20150063939A (ko) | 2015-06-10 |
US9564329B2 (en) | 2017-02-07 |
JP6616070B2 (ja) | 2019-12-04 |
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KR102393908B1 (ko) | 2022-05-02 |
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