JP2014524625A - Rfidチップモジュール - Google Patents
Rfidチップモジュール Download PDFInfo
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- JP2014524625A JP2014524625A JP2014526438A JP2014526438A JP2014524625A JP 2014524625 A JP2014524625 A JP 2014524625A JP 2014526438 A JP2014526438 A JP 2014526438A JP 2014526438 A JP2014526438 A JP 2014526438A JP 2014524625 A JP2014524625 A JP 2014524625A
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- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
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- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
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- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
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- G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
- G06K19/07758—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for adhering the record carrier to further objects or living beings, functioning as an identification tag
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- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
- G06K19/0775—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna
- G06K19/07752—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna using an interposer
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- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07749—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card
- G06K19/0775—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna
- G06K19/07754—Constructional details, e.g. mounting of circuits in the carrier the record carrier being capable of non-contact communication, e.g. constructional details of the antenna of a non-contact smart card arrangements for connecting the integrated circuit to the antenna the connection being galvanic
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- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
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- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
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- H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
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- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
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- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
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- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
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- H01L2224/8112—Aligning
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- H01L2224/818—Bonding techniques
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Abstract
【選択図】図1
Description
Claims (15)
- 第一主表面(1a)及び前記第一主表面(1a)の反対側にある第二主表面(1b)を有するキャリア(1)と、
前記第一主表面(1a)内で前記キャリア(1)内に配置された第一リセス構造(4)と、
前記キャリア(1)の前記第一リセス構造(4)内に配置されたチップ(5)と、
前記キャリア(1)の前記第二主表面上に積層されたパターン化された金属化層(2)であって、第一金属化構造(2a)及び第二金属化構造(2b)を有しており、前記第一金属化構造(2a)は前記第二金属化構造(2b)から電気的に絶縁されており、前記チップ(5)が前記第一金属化構造(2a)及び前記第二金属化構造(2b)と電気的に接続されている前記金属化層(2)とを備えるチップモジュール(10;20;30)。 - 前記キャリア(1)は可視的であり、UV、及び/又は赤外線光に対して透過的な材料を備える請求項1に記載のチップモジュール(10;20;30)。
- 前記第一金属化構造(2a)の反対側にある前記第一主表面(1a)内で前記キャリア(1)内に配置された第二リセス構造(6a)と、
前記第二金属化構造(2b)の反対側にある前記第一主表面(1a)内で前記キャリア(1)内に配置された第三リセス構造(6b)とを更に備える請求項1又は請求項2に記載のチップモジュール(10;20;30)。 - 前記第二及び第三リセス構造(6)が前記第一主表面(1a)から前記第二主表面(1b)へ前記キャリア(1)を通して伸びているビアである請求項3に記載のチップモジュール(10;20;30)。
- 前記ビア(6)が前記第一及び前記第二金属化構造(2a、2b)を通して伸びている請求項4に記載のチップモジュール(10;20;30)。
- 前記第一及び前記第二金属化構造(2a、2b)がそれぞれ前記第二主表面(1b)上で前記チップモジュール(10)の端部に広がっている連続金属化部材と、前記連続金属化部材から前記チップモジュール(10)の中心部へ伸びる金属化領域でパターン化されている請求項1から請求項5のいずれか1項に記載のチップモジュール(10;20;30)。
- 前記金属化層(2)と前記キャリア(1)の間に配置されたフォトレジスト層を更に備える請求項1から請求項6のいずれか1項に記載のチップモジュール(10;20;30)。
- 前記リセス構造(4)内の前記チップ(5)が成形材料で成形されている請求項1から請求項7のいずれか1項に記載のチップモジュール(10;20;30)。
- 前記チップ(5)がRFIDチップである請求項1から請求項8のいずれか1項に記載のチップモジュール(10;20;30)。
- 前記第一金属化構造(2a)上に配置されている第一はんだバンプ(3)と、
前記第二金属化構造(2b)上に配置されている第二はんだバンプ(3)とを更に備える請求項1から請求項9のいずれか1項に記載のチップモジュール(10;20;30)。 - チップモジュール(10;20;30)を基板に接合するための方法(50)であって、前記チップモジュール(10;20;30)は、第一主表面(1a)及び前記第一主表面(1a)の反対側にある第二主表面(1b)を有するキャリア(1)と、前記キャリア(1)の前記第二主表面上に積層されたパターン化された金属化層(2)であって、第一はんだバンプ(3a)が付着した第一金属化構造(2a)及び第二はんだバンプ(3b)が付着した第二金属化構造(2b)を有する前記金属化層(2)とを備え、
基板(47;61)上に前記チップモジュール(10;20;30)を、前記チップモジュール(10;20;30)の前記第二主表面(1b)が前記基板(47;61)に面するように設置することと、
前記チップモジュール(10;20;30)の前記第一はんだバンプ(3a)及び前記第二はんだバンプ(3b)を前記基板(47;61)上の対応する第一及び第二金属化パターン(62)と位置合わせることと、
前記チップモジュール(10;20;30)にレーザービーム(L)を、前記レーザービーム(L)が前記第一主表面(1a)に直角に当たるように照射することと、
前記レーザービーム(L)によって前記第一及び前記第二はんだバンプ(3a、3b)を、前記第一及び前記第二はんだバンプ(3a、3b)と前記基板(47;61)上の対応する前記第一及び第二金属化パターン(62)との間にはんだ接合を形成するようにリフローすることを備える方法。 - テープから前記チップモジュール(10;20;30)を型抜くこと更に備え、前記テープが複数のチップモジュール(10;20;30)から成る請求項11に記載の方法(50)。
- 前記チップモジュール(10;20;30)がRFIDチップ(5)を備え、前記基板(47;61)上の前記第一及び第二金属化パターン(62)がRFIDアンテナ構造を形成している請求項11又は請求項12に記載の方法(50)。
- 請求項9に記載のチップモジュール(10;20;30)と、
RFIDアンテナ構造(62)を有する基板(61)であって、前記チップモジュール(10;20;30)が前記RFIDアンテナ構造(62)にはんだ付けされている基板(61)とを備えるRFIDラベル(60)。 - 前記基板(61)が、繊維基板である請求項14に記載のRFIDラベル(60)。
Applications Claiming Priority (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
EP11178848.5 | 2011-08-25 | ||
EP11178848.5A EP2562692B1 (en) | 2011-08-25 | 2011-08-25 | RFID chip module |
PCT/EP2012/065433 WO2013026697A1 (en) | 2011-08-25 | 2012-08-07 | Rfid chip module |
Publications (2)
Publication Number | Publication Date |
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JP2014524625A true JP2014524625A (ja) | 2014-09-22 |
JP5837982B2 JP5837982B2 (ja) | 2015-12-24 |
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2014526438A Expired - Fee Related JP5837982B2 (ja) | 2011-08-25 | 2012-08-07 | Rfidチップモジュール |
Country Status (11)
Country | Link |
---|---|
US (2) | US9208426B2 (ja) |
EP (1) | EP2562692B1 (ja) |
JP (1) | JP5837982B2 (ja) |
KR (1) | KR101609167B1 (ja) |
CN (1) | CN103765446B (ja) |
BR (1) | BR112014003401A2 (ja) |
CA (1) | CA2843203A1 (ja) |
ES (1) | ES2439508T3 (ja) |
HK (1) | HK1177299A1 (ja) |
RU (1) | RU2581941C2 (ja) |
WO (1) | WO2013026697A1 (ja) |
Families Citing this family (18)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8188927B1 (en) | 2008-03-11 | 2012-05-29 | Impinj, Inc. | RFID tag assembly methods |
US11288564B1 (en) | 2008-03-11 | 2022-03-29 | Impinj, Inc. | High-speed RFID tag assembly using impulse heating |
US9846833B1 (en) | 2013-02-25 | 2017-12-19 | Impinj, Inc. | High-speed RFID tag assembly using impulse heating |
EP2562692B1 (en) * | 2011-08-25 | 2013-10-09 | Textilma Ag | RFID chip module |
WO2014096140A1 (de) * | 2012-12-19 | 2014-06-26 | Forster Rohner Ag | Bauelement, verfahren zur herstellung eines bauelements, bauelementanordnung, sowie verfahren zum applizieren eines bauelements |
JP2018514071A (ja) * | 2015-01-27 | 2018-05-31 | ネーデルランドセ・オルガニサティ・フォール・トゥーヘパスト−ナトゥールウェテンスハッペライク・オンデルズーク・テーエヌオー | 繊維層アセンブリ用の可撓性デバイスモジュールおよび作製方法 |
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Also Published As
Publication number | Publication date |
---|---|
EP2562692A1 (en) | 2013-02-27 |
BR112014003401A2 (pt) | 2017-03-01 |
JP5837982B2 (ja) | 2015-12-24 |
CA2843203A1 (en) | 2013-02-28 |
KR20140053275A (ko) | 2014-05-07 |
CN103765446A (zh) | 2014-04-30 |
RU2014110523A (ru) | 2015-09-27 |
US20140210078A1 (en) | 2014-07-31 |
US9208426B2 (en) | 2015-12-08 |
KR101609167B1 (ko) | 2016-04-05 |
CN103765446B (zh) | 2017-02-15 |
EP2562692B1 (en) | 2013-10-09 |
HK1177299A1 (en) | 2013-08-16 |
RU2581941C2 (ru) | 2016-04-20 |
ES2439508T3 (es) | 2014-01-23 |
WO2013026697A1 (en) | 2013-02-28 |
US9542636B2 (en) | 2017-01-10 |
US20150262053A1 (en) | 2015-09-17 |
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