JP2014519192A5 - - Google Patents

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Publication number
JP2014519192A5
JP2014519192A5 JP2014509858A JP2014509858A JP2014519192A5 JP 2014519192 A5 JP2014519192 A5 JP 2014519192A5 JP 2014509858 A JP2014509858 A JP 2014509858A JP 2014509858 A JP2014509858 A JP 2014509858A JP 2014519192 A5 JP2014519192 A5 JP 2014519192A5
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JP
Japan
Prior art keywords
nitride layer
layer
tensile
gate structure
trench
Prior art date
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Application number
JP2014509858A
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English (en)
Japanese (ja)
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JP2014519192A (ja
JP5657176B2 (ja
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Priority claimed from US13/103,149 external-priority patent/US8421132B2/en
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Publication of JP2014519192A publication Critical patent/JP2014519192A/ja
Publication of JP2014519192A5 publication Critical patent/JP2014519192A5/ja
Application granted granted Critical
Publication of JP5657176B2 publication Critical patent/JP5657176B2/ja
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2014509858A 2011-05-09 2012-02-24 置換ゲート・トランジスタの作製におけるuv硬化の応力利得の保持 Expired - Fee Related JP5657176B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/103,149 US8421132B2 (en) 2011-05-09 2011-05-09 Post-planarization UV curing of stress inducing layers in replacement gate transistor fabrication
US13/103,149 2011-05-09
PCT/IB2012/050847 WO2012153201A1 (en) 2011-05-09 2012-02-24 Preserving stress benefits of uv curing in replacement gate transistor fabrication

Publications (3)

Publication Number Publication Date
JP2014519192A JP2014519192A (ja) 2014-08-07
JP2014519192A5 true JP2014519192A5 (https=) 2014-09-18
JP5657176B2 JP5657176B2 (ja) 2015-01-21

Family

ID=47138851

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2014509858A Expired - Fee Related JP5657176B2 (ja) 2011-05-09 2012-02-24 置換ゲート・トランジスタの作製におけるuv硬化の応力利得の保持

Country Status (6)

Country Link
US (1) US8421132B2 (https=)
JP (1) JP5657176B2 (https=)
CN (1) CN103620748B (https=)
DE (1) DE112012001089B4 (https=)
GB (1) GB2503848B (https=)
WO (1) WO2012153201A1 (https=)

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US8765561B2 (en) * 2011-06-06 2014-07-01 United Microelectronics Corp. Method for fabricating semiconductor device
US8658487B2 (en) * 2011-11-17 2014-02-25 United Microelectronics Corp. Semiconductor device and fabrication method thereof
US8803249B2 (en) * 2012-08-09 2014-08-12 Taiwan Semiconductor Manufacturing Co., Ltd. Profile pre-shaping for replacement poly gate interlayer dielectric
US9293466B2 (en) 2013-06-19 2016-03-22 Taiwan Semiconductor Manufacturing Company, Ltd. Embedded SRAM and methods of forming the same
US9520474B2 (en) * 2013-09-12 2016-12-13 Taiwan Semiconductor Manufacturing Company Limited Methods of forming a semiconductor device with a gate stack having tapered sidewalls
CN104637797A (zh) * 2013-11-12 2015-05-20 中国科学院微电子研究所 一种后栅工艺中ild层的处理方法
CN104681597A (zh) * 2013-11-28 2015-06-03 中国科学院微电子研究所 半导体器件及其制造方法
US9312174B2 (en) * 2013-12-17 2016-04-12 United Microelectronics Corp. Method for manufacturing contact plugs for semiconductor devices
CN105225949B (zh) * 2014-05-26 2018-08-21 中芯国际集成电路制造(上海)有限公司 一种半导体器件的制造方法和电子装置
US10068982B2 (en) * 2014-05-29 2018-09-04 Taiwan Semiconductor Manufacturing Co., Ltd Structure and formation method of semiconductor device structure with metal gate
CN105336588B (zh) * 2014-05-29 2019-01-22 中芯国际集成电路制造(上海)有限公司 半导体器件的形成方法
US10164049B2 (en) 2014-10-06 2018-12-25 Taiwan Semiconductor Manufacturing Company, Ltd. Structure and formation method of semiconductor device with gate stack
KR102224386B1 (ko) * 2014-12-18 2021-03-08 삼성전자주식회사 집적 회로 장치의 제조 방법
KR101785803B1 (ko) 2015-05-29 2017-10-16 타이완 세미콘덕터 매뉴팩쳐링 컴퍼니 리미티드 반도체 디바이스 구조체의 형성 방법
US9553090B2 (en) 2015-05-29 2017-01-24 Taiwan Semiconductor Manufacturing Company, Ltd. Structure and formation method of semiconductor device structure
CN107170684B (zh) * 2016-03-08 2020-05-08 中芯国际集成电路制造(上海)有限公司 鳍式场效应晶体管的形成方法
US10147649B2 (en) 2016-05-27 2018-12-04 Taiwan Semiconductor Manufacturing Co., Ltd. Semiconductor device structure with gate stack and method for forming the same
US10020401B2 (en) 2016-11-29 2018-07-10 Taiwan Semiconductor Manufacturing Company, Ltd. Methods for straining a transistor gate through interlayer dielectric (ILD) doping schemes
US9786754B1 (en) * 2017-02-06 2017-10-10 Vanguard International Semiconductor Corporation Method for forming semiconductor device structure
CN109585293B (zh) * 2017-09-29 2021-12-24 台湾积体电路制造股份有限公司 切割金属工艺中的基脚去除
JP7837860B2 (ja) * 2019-08-09 2026-03-31 ヒタチ・エナジー・リミテッド 歪み強化型SiCパワー半導体デバイスおよび製造方法

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US6465309B1 (en) 2000-12-12 2002-10-15 Advanced Micro Devices, Inc. Silicide gate transistors
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JP2008518476A (ja) * 2004-10-29 2008-05-29 アドバンスト・マイクロ・ディバイシズ・インコーポレイテッド 異なるように歪ませた歪みチャネル領域を有する半導体領域を含む、半導体デバイスおよびその製造方法
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