JP2014511039A5 - - Google Patents

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Publication number
JP2014511039A5
JP2014511039A5 JP2014502583A JP2014502583A JP2014511039A5 JP 2014511039 A5 JP2014511039 A5 JP 2014511039A5 JP 2014502583 A JP2014502583 A JP 2014502583A JP 2014502583 A JP2014502583 A JP 2014502583A JP 2014511039 A5 JP2014511039 A5 JP 2014511039A5
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JP
Japan
Prior art keywords
conductor pad
conductor
pad
solder
gap
Prior art date
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Granted
Application number
JP2014502583A
Other languages
English (en)
Japanese (ja)
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JP2014511039A (ja
JP5764256B2 (ja
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Publication date
Priority claimed from US13/072,554 external-priority patent/US8647974B2/en
Application filed filed Critical
Publication of JP2014511039A publication Critical patent/JP2014511039A/ja
Publication of JP2014511039A5 publication Critical patent/JP2014511039A5/ja
Application granted granted Critical
Publication of JP5764256B2 publication Critical patent/JP5764256B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

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JP2014502583A 2011-03-25 2012-03-03 支持端子パッドを有する半導体チップ Active JP5764256B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US13/072,554 US8647974B2 (en) 2011-03-25 2011-03-25 Method of fabricating a semiconductor chip with supportive terminal pad
US13/072,554 2011-03-25
PCT/US2012/027631 WO2012134710A1 (en) 2011-03-25 2012-03-03 Semiconductor chip with supportive terminal pad

Publications (3)

Publication Number Publication Date
JP2014511039A JP2014511039A (ja) 2014-05-01
JP2014511039A5 true JP2014511039A5 (enExample) 2015-02-12
JP5764256B2 JP5764256B2 (ja) 2015-08-19

Family

ID=45992817

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2014502583A Active JP5764256B2 (ja) 2011-03-25 2012-03-03 支持端子パッドを有する半導体チップ

Country Status (7)

Country Link
US (1) US8647974B2 (enExample)
EP (1) EP2689455B1 (enExample)
JP (1) JP5764256B2 (enExample)
KR (1) KR101508669B1 (enExample)
CN (1) CN103460379A (enExample)
TW (1) TWI517273B (enExample)
WO (1) WO2012134710A1 (enExample)

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7749885B2 (en) * 2006-12-15 2010-07-06 Micron Technology, Inc. Semiconductor processing methods, methods of forming contact pads, and methods of forming electrical connections between metal-containing layers
US9978656B2 (en) * 2011-11-22 2018-05-22 Taiwan Semiconductor Manufacturing Company, Ltd. Mechanisms for forming fine-pitch copper bump structures
US9224688B2 (en) * 2013-01-04 2015-12-29 Taiwan Semiconductor Manufacturing Company, Ltd. Metal routing architecture for integrated circuits
US10242142B2 (en) * 2013-03-14 2019-03-26 Coventor, Inc. Predictive 3-D virtual fabrication system and method
US9793231B2 (en) * 2015-06-30 2017-10-17 Taiwan Semiconductor Manufacturing Company, Ltd. Under bump metallurgy (UBM) and methods of forming same
US9818711B2 (en) * 2015-06-30 2017-11-14 Taiwan Semiconductor Manufacturing Company, Ltd. Post-passivation interconnect structure and methods thereof
KR102410018B1 (ko) * 2015-09-18 2022-06-16 삼성전자주식회사 반도체 패키지
US9929112B2 (en) * 2015-09-25 2018-03-27 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device and method of manufacture
US10165682B2 (en) 2015-12-28 2018-12-25 Taiwan Semiconductor Manufacturing Company, Ltd. Opening in the pad for bonding integrated passive device in InFO package
US9704832B1 (en) * 2016-02-29 2017-07-11 Ixys Corporation Die stack assembly using an edge separation structure for connectivity through a die of the stack
KR102663140B1 (ko) 2016-06-24 2024-05-08 삼성디스플레이 주식회사 디스플레이 장치
MY192389A (en) * 2016-07-01 2022-08-18 Intel Corp Systems, methods, and apparatuses for implementing a pad on solder mask (posm) semiconductor substrate package
US10290584B2 (en) * 2017-05-31 2019-05-14 Taiwan Semiconductor Manufacturing Company, Ltd. Conductive vias in semiconductor packages and methods of forming same
DE102017210654B4 (de) * 2017-06-23 2022-06-09 Infineon Technologies Ag Elektronische Vorrichtung, die ein einen Hohlraum umfassendes Umverdrahtungsschicht-Pad umfasst
US10665559B2 (en) * 2018-04-11 2020-05-26 Taiwan Semiconductor Manufacturing Co., Ltd. Device, semiconductor package and method of manufacturing semiconductor package

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US3615913A (en) 1968-11-08 1971-10-26 Westinghouse Electric Corp Polyimide and polyamide-polyimide as a semiconductor surface passivator and protectant coating
US4034469A (en) 1976-09-03 1977-07-12 Ibm Corporation Method of making conduction-cooled circuit package
JPH06163629A (ja) 1992-11-26 1994-06-10 Sanyo Electric Co Ltd 半導体集積回路のボンディングパッド構造
JP3138159B2 (ja) * 1994-11-22 2001-02-26 シャープ株式会社 半導体装置、半導体装置実装体、及び半導体装置の交換方法
JPH09134934A (ja) * 1995-11-07 1997-05-20 Sumitomo Metal Ind Ltd 半導体パッケージ及び半導体装置
US6118180A (en) * 1997-11-03 2000-09-12 Lsi Logic Corporation Semiconductor die metal layout for flip chip packaging
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US8030781B2 (en) 2008-09-19 2011-10-04 Taiwan Semiconductor Manufacturing Co., Ltd. Bond pad structure having dummy plugs and/or patterns formed therearound
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