JP2013536572A5 - - Google Patents
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- Publication number
- JP2013536572A5 JP2013536572A5 JP2013520812A JP2013520812A JP2013536572A5 JP 2013536572 A5 JP2013536572 A5 JP 2013536572A5 JP 2013520812 A JP2013520812 A JP 2013520812A JP 2013520812 A JP2013520812 A JP 2013520812A JP 2013536572 A5 JP2013536572 A5 JP 2013536572A5
- Authority
- JP
- Japan
- Prior art keywords
- type
- doped semiconductor
- memory cell
- semiconductor base
- junctions
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims 26
- 239000012212 insulator Substances 0.000 claims 1
- 239000002184 metal Substances 0.000 claims 1
- 239000000758 substrate Substances 0.000 claims 1
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/838,803 | 2010-07-19 | ||
| US12/838,803 US8455919B2 (en) | 2010-07-19 | 2010-07-19 | High density thyristor random access memory device and method |
| PCT/US2011/044546 WO2012012435A2 (en) | 2010-07-19 | 2011-07-19 | High density thyristor random access memory device and method |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2013536572A JP2013536572A (ja) | 2013-09-19 |
| JP2013536572A5 true JP2013536572A5 (enExample) | 2014-09-11 |
| JP5686896B2 JP5686896B2 (ja) | 2015-03-18 |
Family
ID=45466254
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2013520812A Active JP5686896B2 (ja) | 2010-07-19 | 2011-07-19 | 高密度サイリスタ・ランダムアクセスメモリ装置及び方法 |
Country Status (6)
| Country | Link |
|---|---|
| US (2) | US8455919B2 (enExample) |
| JP (1) | JP5686896B2 (enExample) |
| KR (1) | KR101875677B1 (enExample) |
| CN (1) | CN103098212B (enExample) |
| TW (1) | TWI481015B (enExample) |
| WO (1) | WO2012012435A2 (enExample) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8455919B2 (en) | 2010-07-19 | 2013-06-04 | Micron Technology, Inc. | High density thyristor random access memory device and method |
| US8739010B2 (en) * | 2010-11-19 | 2014-05-27 | Altera Corporation | Memory array with redundant bits and memory element voting circuits |
| US9510564B2 (en) * | 2012-05-22 | 2016-12-06 | Doskocil Manufacturing Company, Inc. | Treat dispenser |
| KR101719944B1 (ko) * | 2013-03-04 | 2017-03-24 | 신닛테츠스미킨 카부시키카이샤 | 충격 흡수 부품 |
| WO2015006457A1 (en) * | 2013-07-09 | 2015-01-15 | United Technologies Corporation | Reinforced plated polymers |
| TWI572018B (zh) * | 2015-10-28 | 2017-02-21 | 旺宏電子股份有限公司 | 記憶體元件及其製作方法 |
Family Cites Families (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US7052941B2 (en) * | 2003-06-24 | 2006-05-30 | Sang-Yun Lee | Method for making a three-dimensional integrated circuit structure |
| JP2002216482A (ja) * | 2000-11-17 | 2002-08-02 | Toshiba Corp | 半導体メモリ集積回路 |
| US6906354B2 (en) | 2001-06-13 | 2005-06-14 | International Business Machines Corporation | T-RAM cell having a buried vertical thyristor and a pseudo-TFT transfer gate and method for fabricating the same |
| JP2003030980A (ja) * | 2001-07-13 | 2003-01-31 | Toshiba Corp | 半導体記憶装置 |
| US6686612B1 (en) | 2002-10-01 | 2004-02-03 | T-Ram, Inc. | Thyristor-based device adapted to inhibit parasitic current |
| US6953953B1 (en) * | 2002-10-01 | 2005-10-11 | T-Ram, Inc. | Deep trench isolation for thyristor-based semiconductor device |
| US6980457B1 (en) | 2002-11-06 | 2005-12-27 | T-Ram, Inc. | Thyristor-based device having a reduced-resistance contact to a buried emitter region |
| US7195959B1 (en) * | 2004-10-04 | 2007-03-27 | T-Ram Semiconductor, Inc. | Thyristor-based semiconductor device and method of fabrication |
| US7081378B2 (en) | 2004-01-05 | 2006-07-25 | Chartered Semiconductor Manufacturing Ltd. | Horizontal TRAM and method for the fabrication thereof |
| US7224002B2 (en) * | 2004-05-06 | 2007-05-29 | Micron Technology, Inc. | Silicon on insulator read-write non-volatile memory comprising lateral thyristor and trapping layer |
| JP4696964B2 (ja) | 2005-07-15 | 2011-06-08 | ソニー株式会社 | メモリ用の半導体装置 |
| JP2007067133A (ja) * | 2005-08-31 | 2007-03-15 | Sony Corp | 半導体装置 |
| US7655973B2 (en) * | 2005-10-31 | 2010-02-02 | Micron Technology, Inc. | Recessed channel negative differential resistance-based memory cell |
| US20090179262A1 (en) | 2008-01-16 | 2009-07-16 | Qimonda Ag | Floating Body Memory Cell with a Non-Overlapping Gate Electrode |
| US7750392B2 (en) * | 2008-03-03 | 2010-07-06 | Aptina Imaging Corporation | Embedded cache memory in image sensors |
| US8455919B2 (en) | 2010-07-19 | 2013-06-04 | Micron Technology, Inc. | High density thyristor random access memory device and method |
-
2010
- 2010-07-19 US US12/838,803 patent/US8455919B2/en active Active
-
2011
- 2011-07-18 TW TW100125334A patent/TWI481015B/zh active
- 2011-07-19 CN CN201180042303.4A patent/CN103098212B/zh active Active
- 2011-07-19 KR KR1020137004069A patent/KR101875677B1/ko active Active
- 2011-07-19 JP JP2013520812A patent/JP5686896B2/ja active Active
- 2011-07-19 WO PCT/US2011/044546 patent/WO2012012435A2/en not_active Ceased
-
2012
- 2012-09-15 US US13/621,002 patent/US8754443B2/en active Active
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