JP2013508941A5 - - Google Patents

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Publication number
JP2013508941A5
JP2013508941A5 JP2012533445A JP2012533445A JP2013508941A5 JP 2013508941 A5 JP2013508941 A5 JP 2013508941A5 JP 2012533445 A JP2012533445 A JP 2012533445A JP 2012533445 A JP2012533445 A JP 2012533445A JP 2013508941 A5 JP2013508941 A5 JP 2013508941A5
Authority
JP
Japan
Prior art keywords
integrated circuit
circuit device
vias
stacked integrated
die
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2012533445A
Other languages
English (en)
Japanese (ja)
Other versions
JP2013508941A (ja
Filing date
Publication date
Priority claimed from US12/773,340 external-priority patent/US8604593B2/en
Application filed filed Critical
Publication of JP2013508941A publication Critical patent/JP2013508941A/ja
Publication of JP2013508941A5 publication Critical patent/JP2013508941A5/ja
Pending legal-status Critical Current

Links

JP2012533445A 2009-10-19 2010-10-19 積層されたマルチダイパッケージにおけるシリコン貫通ビアの再構成 Pending JP2013508941A (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US25286509P 2009-10-19 2009-10-19
US61/252,865 2009-10-19
US12/773,340 US8604593B2 (en) 2009-10-19 2010-05-04 Reconfiguring through silicon vias in stacked multi-die packages
US12/773,340 2010-05-04
PCT/CA2010/001650 WO2011047470A1 (en) 2009-10-19 2010-10-19 Reconfiguring through silicon vias in stacked multi-die packages

Publications (2)

Publication Number Publication Date
JP2013508941A JP2013508941A (ja) 2013-03-07
JP2013508941A5 true JP2013508941A5 (enExample) 2013-11-28

Family

ID=43878833

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2012533445A Pending JP2013508941A (ja) 2009-10-19 2010-10-19 積層されたマルチダイパッケージにおけるシリコン貫通ビアの再構成

Country Status (7)

Country Link
US (2) US8604593B2 (enExample)
EP (1) EP2491589A4 (enExample)
JP (1) JP2013508941A (enExample)
KR (1) KR20120085650A (enExample)
CN (1) CN102227806A (enExample)
TW (1) TWI476889B (enExample)
WO (1) WO2011047470A1 (enExample)

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US9229887B2 (en) * 2008-02-19 2016-01-05 Micron Technology, Inc. Memory device with network on chip methods, apparatus, and systems
US7978721B2 (en) 2008-07-02 2011-07-12 Micron Technology Inc. Multi-serial interface stacked-die memory architecture
US8086913B2 (en) 2008-09-11 2011-12-27 Micron Technology, Inc. Methods, apparatus, and systems to repair memory
US9123552B2 (en) * 2010-03-30 2015-09-01 Micron Technology, Inc. Apparatuses enabling concurrent communication between an interface die and a plurality of dice stacks, interleaved conductive paths in stacked devices, and methods for forming and operating the same
US8362602B2 (en) * 2010-08-09 2013-01-29 Headway Technologies, Inc. Layered chip package and method of manufacturing same
US8916910B2 (en) * 2010-12-13 2014-12-23 Research Foundation Of State University Of New York Reconfigurable RF/digital hybrid 3D interconnect
KR101817156B1 (ko) * 2010-12-28 2018-01-10 삼성전자 주식회사 관통 전극을 갖는 적층 구조의 반도체 장치, 반도체 메모리 장치, 반도체 메모리 시스템 및 그 동작방법
KR101208962B1 (ko) * 2011-02-22 2012-12-06 에스케이하이닉스 주식회사 반도체 장치
US8624626B2 (en) 2011-11-14 2014-01-07 Taiwan Semiconductor Manufacturing Co., Ltd. 3D IC structure and method
US20130159587A1 (en) * 2011-12-15 2013-06-20 Aaron Nygren Interconnect Redundancy for Multi-Interconnect Device
US8933715B2 (en) 2012-04-08 2015-01-13 Elm Technology Corporation Configurable vertical integration
US9448947B2 (en) * 2012-06-01 2016-09-20 Qualcomm Incorporated Inter-chip memory interface structure
US9478502B2 (en) * 2012-07-26 2016-10-25 Micron Technology, Inc. Device identification assignment and total device number detection
US9026872B2 (en) * 2012-08-16 2015-05-05 Xilinx, Inc. Flexible sized die for use in multi-die integrated circuit
KR102058101B1 (ko) * 2012-12-20 2019-12-20 에스케이하이닉스 주식회사 반도체 집적회로
KR102190382B1 (ko) 2012-12-20 2020-12-11 삼성전자주식회사 반도체 패키지
US9612988B2 (en) * 2013-07-23 2017-04-04 International Business Machines Corporation Donor cores to improve integrated circuit yield
US20150155039A1 (en) * 2013-12-02 2015-06-04 Silicon Storage Technology, Inc. Three-Dimensional Flash NOR Memory System With Configurable Pins
US9245825B2 (en) 2014-01-23 2016-01-26 Sandisk Technologies Inc. I/O pin capacitance reduction using TSVS
US9501603B2 (en) 2014-09-05 2016-11-22 International Business Machines Corporation Integrated circuit design changes using through-silicon vias
US10002653B2 (en) 2014-10-28 2018-06-19 Nxp Usa, Inc. Die stack address bus having a programmable width
KR102290020B1 (ko) * 2015-06-05 2021-08-19 삼성전자주식회사 스택드 칩 구조에서 소프트 데이터 페일 분석 및 구제 기능을 제공하는 반도체 메모리 장치
US9871020B1 (en) * 2016-07-14 2018-01-16 Globalfoundries Inc. Through silicon via sharing in a 3D integrated circuit
US10249590B2 (en) 2017-06-06 2019-04-02 Globalfoundries Inc. Stacked dies using one or more interposers
US10838831B2 (en) * 2018-05-14 2020-11-17 Micron Technology, Inc. Die-scope proximity disturb and defect remapping scheme for non-volatile memory
US11055167B2 (en) * 2018-05-14 2021-07-06 Micron Technology, Inc. Channel-scope proximity disturb and defect remapping scheme for non-volatile memory
US11048597B2 (en) * 2018-05-14 2021-06-29 Micron Technology, Inc. Memory die remapping
CN112102862B (zh) * 2020-09-22 2023-03-07 武汉新芯集成电路制造有限公司 芯片结构、数据读取处理方法及芯片结构制造方法
US11226767B1 (en) * 2020-09-30 2022-01-18 Micron Technology, Inc. Apparatus with access control mechanism and methods for operating the same
US11468945B2 (en) * 2020-10-15 2022-10-11 Arm Limited 3D storage architecture with tier-specific controls
US20250209027A1 (en) * 2023-12-22 2025-06-26 Intel Corporation Resilient i/o interconnect

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US20030040166A1 (en) 2001-05-25 2003-02-27 Mark Moshayedi Apparatus and method for stacking integrated circuits
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JP4708176B2 (ja) * 2005-12-08 2011-06-22 エルピーダメモリ株式会社 半導体装置
US7352602B2 (en) * 2005-12-30 2008-04-01 Micron Technology, Inc. Configurable inputs and outputs for memory stacking system and method
US20070220207A1 (en) * 2006-03-14 2007-09-20 Bryan Black Transferring data from stacked memory
TWI332239B (en) * 2006-12-14 2010-10-21 United Microelectronics Corp Semiconductor wafer and method for forming the same
KR100871381B1 (ko) * 2007-06-20 2008-12-02 주식회사 하이닉스반도체 관통 실리콘 비아 칩 스택 패키지
US7863733B2 (en) * 2007-07-11 2011-01-04 Arm Limited Integrated circuit with multiple layers of circuits
US8136071B2 (en) 2007-09-12 2012-03-13 Neal Solomon Three dimensional integrated circuits and methods of fabrication
US20090072373A1 (en) * 2007-09-14 2009-03-19 Reynaldo Corpuz Javier Packaged integrated circuits and methods to form a stacked integrated circuit package
US7816934B2 (en) * 2007-10-16 2010-10-19 Micron Technology, Inc. Reconfigurable connections for stacked semiconductor devices
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US8977809B2 (en) * 2008-11-26 2015-03-10 Micron Technology, Inc. Sharing resources in multi-dice stacks

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