KR20120085650A - 스택된 멀티-다이 패키지에서의 관통 실리콘 비아 재구성 - Google Patents

스택된 멀티-다이 패키지에서의 관통 실리콘 비아 재구성 Download PDF

Info

Publication number
KR20120085650A
KR20120085650A KR1020117011810A KR20117011810A KR20120085650A KR 20120085650 A KR20120085650 A KR 20120085650A KR 1020117011810 A KR1020117011810 A KR 1020117011810A KR 20117011810 A KR20117011810 A KR 20117011810A KR 20120085650 A KR20120085650 A KR 20120085650A
Authority
KR
South Korea
Prior art keywords
die
vias
integrated circuit
signal
configuration
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
KR1020117011810A
Other languages
English (en)
Korean (ko)
Inventor
롤란드 슈에츠
Original Assignee
모사이드 테크놀로지스 인코퍼레이티드
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 모사이드 테크놀로지스 인코퍼레이티드 filed Critical 모사이드 테크놀로지스 인코퍼레이티드
Publication of KR20120085650A publication Critical patent/KR20120085650A/ko
Withdrawn legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/50Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/03Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065Assemblies consisting of a plurality of semiconductor or other solid state devices all the devices being of a type provided for in a single subclass of subclasses H10B, H10D, H10F, H10H, H10K or H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H10D89/00
    • H01L25/0657Stacked arrangements of devices
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C29/00Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70Masking faults in memories by using spares or by reconfiguring
    • G11C29/78Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G11C29/80Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout
    • G11C29/808Masking faults in memories by using spares or by reconfiguring using programmable devices with improved layout using a flexible replacement scheme
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/481Internal lead connections, e.g. via connections, feedthrough structures
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of semiconductor or other solid state devices
    • H01L25/18Assemblies consisting of a plurality of semiconductor or other solid state devices the devices being of the types provided for in two or more different main groups of the same subclass of H10B, H10D, H10F, H10H, H10K or H10N
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
    • H01L2225/04All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L2225/065All the devices being of a type provided for in the same main group of the same subclass of class H10
    • H01L2225/06503Stacked arrangements of devices
    • H01L2225/06513Bump or bump-like direct electrical connections between devices, e.g. flip-chip connection, solder bumps
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
    • H01L2225/04All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L2225/065All the devices being of a type provided for in the same main group of the same subclass of class H10
    • H01L2225/06503Stacked arrangements of devices
    • H01L2225/06527Special adaptation of electrical connections, e.g. rewiring, engineering changes, pressure contacts, layout
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes
    • H01L2225/04All the devices being of a type provided for in the same main group of the same subclass of class H10, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L2225/065All the devices being of a type provided for in the same main group of the same subclass of class H10
    • H01L2225/06503Stacked arrangements of devices
    • H01L2225/06541Conductive via connections through the device, e.g. vertical interconnects, through silicon via [TSV]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/0002Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Integrated Circuits (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
KR1020117011810A 2009-10-19 2010-10-19 스택된 멀티-다이 패키지에서의 관통 실리콘 비아 재구성 Withdrawn KR20120085650A (ko)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US25286509P 2009-10-19 2009-10-19
US61/252,865 2009-10-19
US12/773,340 US8604593B2 (en) 2009-10-19 2010-05-04 Reconfiguring through silicon vias in stacked multi-die packages
US12/773,340 2010-05-04
PCT/CA2010/001650 WO2011047470A1 (en) 2009-10-19 2010-10-19 Reconfiguring through silicon vias in stacked multi-die packages

Publications (1)

Publication Number Publication Date
KR20120085650A true KR20120085650A (ko) 2012-08-01

Family

ID=43878833

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020117011810A Withdrawn KR20120085650A (ko) 2009-10-19 2010-10-19 스택된 멀티-다이 패키지에서의 관통 실리콘 비아 재구성

Country Status (7)

Country Link
US (2) US8604593B2 (enExample)
EP (1) EP2491589A4 (enExample)
JP (1) JP2013508941A (enExample)
KR (1) KR20120085650A (enExample)
CN (1) CN102227806A (enExample)
TW (1) TWI476889B (enExample)
WO (1) WO2011047470A1 (enExample)

Families Citing this family (32)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US11328764B2 (en) * 2005-09-26 2022-05-10 Rambus Inc. Memory system topologies including a memory die stack
US9229887B2 (en) * 2008-02-19 2016-01-05 Micron Technology, Inc. Memory device with network on chip methods, apparatus, and systems
US7978721B2 (en) 2008-07-02 2011-07-12 Micron Technology Inc. Multi-serial interface stacked-die memory architecture
US8086913B2 (en) 2008-09-11 2011-12-27 Micron Technology, Inc. Methods, apparatus, and systems to repair memory
US9123552B2 (en) * 2010-03-30 2015-09-01 Micron Technology, Inc. Apparatuses enabling concurrent communication between an interface die and a plurality of dice stacks, interleaved conductive paths in stacked devices, and methods for forming and operating the same
US8362602B2 (en) * 2010-08-09 2013-01-29 Headway Technologies, Inc. Layered chip package and method of manufacturing same
US8916910B2 (en) * 2010-12-13 2014-12-23 Research Foundation Of State University Of New York Reconfigurable RF/digital hybrid 3D interconnect
KR101817156B1 (ko) * 2010-12-28 2018-01-10 삼성전자 주식회사 관통 전극을 갖는 적층 구조의 반도체 장치, 반도체 메모리 장치, 반도체 메모리 시스템 및 그 동작방법
KR101208962B1 (ko) * 2011-02-22 2012-12-06 에스케이하이닉스 주식회사 반도체 장치
US8624626B2 (en) 2011-11-14 2014-01-07 Taiwan Semiconductor Manufacturing Co., Ltd. 3D IC structure and method
US20130159587A1 (en) * 2011-12-15 2013-06-20 Aaron Nygren Interconnect Redundancy for Multi-Interconnect Device
US8933715B2 (en) 2012-04-08 2015-01-13 Elm Technology Corporation Configurable vertical integration
US9448947B2 (en) * 2012-06-01 2016-09-20 Qualcomm Incorporated Inter-chip memory interface structure
US9478502B2 (en) * 2012-07-26 2016-10-25 Micron Technology, Inc. Device identification assignment and total device number detection
US9026872B2 (en) * 2012-08-16 2015-05-05 Xilinx, Inc. Flexible sized die for use in multi-die integrated circuit
KR102058101B1 (ko) * 2012-12-20 2019-12-20 에스케이하이닉스 주식회사 반도체 집적회로
KR102190382B1 (ko) 2012-12-20 2020-12-11 삼성전자주식회사 반도체 패키지
US9612988B2 (en) * 2013-07-23 2017-04-04 International Business Machines Corporation Donor cores to improve integrated circuit yield
US20150155039A1 (en) * 2013-12-02 2015-06-04 Silicon Storage Technology, Inc. Three-Dimensional Flash NOR Memory System With Configurable Pins
US9245825B2 (en) 2014-01-23 2016-01-26 Sandisk Technologies Inc. I/O pin capacitance reduction using TSVS
US9501603B2 (en) 2014-09-05 2016-11-22 International Business Machines Corporation Integrated circuit design changes using through-silicon vias
US10002653B2 (en) 2014-10-28 2018-06-19 Nxp Usa, Inc. Die stack address bus having a programmable width
KR102290020B1 (ko) * 2015-06-05 2021-08-19 삼성전자주식회사 스택드 칩 구조에서 소프트 데이터 페일 분석 및 구제 기능을 제공하는 반도체 메모리 장치
US9871020B1 (en) * 2016-07-14 2018-01-16 Globalfoundries Inc. Through silicon via sharing in a 3D integrated circuit
US10249590B2 (en) 2017-06-06 2019-04-02 Globalfoundries Inc. Stacked dies using one or more interposers
US10838831B2 (en) * 2018-05-14 2020-11-17 Micron Technology, Inc. Die-scope proximity disturb and defect remapping scheme for non-volatile memory
US11055167B2 (en) * 2018-05-14 2021-07-06 Micron Technology, Inc. Channel-scope proximity disturb and defect remapping scheme for non-volatile memory
US11048597B2 (en) * 2018-05-14 2021-06-29 Micron Technology, Inc. Memory die remapping
CN112102862B (zh) * 2020-09-22 2023-03-07 武汉新芯集成电路制造有限公司 芯片结构、数据读取处理方法及芯片结构制造方法
US11226767B1 (en) * 2020-09-30 2022-01-18 Micron Technology, Inc. Apparatus with access control mechanism and methods for operating the same
US11468945B2 (en) * 2020-10-15 2022-10-11 Arm Limited 3D storage architecture with tier-specific controls
US20250209027A1 (en) * 2023-12-22 2025-06-26 Intel Corporation Resilient i/o interconnect

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW511414B (en) 2001-04-19 2002-11-21 Via Tech Inc Data processing system and method, and control chip, and printed circuit board thereof
US20030040166A1 (en) 2001-05-25 2003-02-27 Mark Moshayedi Apparatus and method for stacking integrated circuits
DE102004045527B4 (de) * 2003-10-08 2009-12-03 Siemens Ag Konfigurierbare Logikschaltungsanordnung
JP4708176B2 (ja) * 2005-12-08 2011-06-22 エルピーダメモリ株式会社 半導体装置
US7352602B2 (en) * 2005-12-30 2008-04-01 Micron Technology, Inc. Configurable inputs and outputs for memory stacking system and method
US20070220207A1 (en) * 2006-03-14 2007-09-20 Bryan Black Transferring data from stacked memory
TWI332239B (en) * 2006-12-14 2010-10-21 United Microelectronics Corp Semiconductor wafer and method for forming the same
KR100871381B1 (ko) * 2007-06-20 2008-12-02 주식회사 하이닉스반도체 관통 실리콘 비아 칩 스택 패키지
US7863733B2 (en) * 2007-07-11 2011-01-04 Arm Limited Integrated circuit with multiple layers of circuits
US8136071B2 (en) 2007-09-12 2012-03-13 Neal Solomon Three dimensional integrated circuits and methods of fabrication
US20090072373A1 (en) * 2007-09-14 2009-03-19 Reynaldo Corpuz Javier Packaged integrated circuits and methods to form a stacked integrated circuit package
US7816934B2 (en) * 2007-10-16 2010-10-19 Micron Technology, Inc. Reconfigurable connections for stacked semiconductor devices
KR101176187B1 (ko) 2007-11-21 2012-08-22 삼성전자주식회사 스택형 반도체 장치 및 이 장치의 직렬 경로 형성 방법
US7791175B2 (en) * 2007-12-20 2010-09-07 Mosaid Technologies Incorporated Method for stacking serially-connected integrated circuits and multi-chip device made from same
US8384417B2 (en) * 2008-09-10 2013-02-26 Qualcomm Incorporated Systems and methods utilizing redundancy in semiconductor chip interconnects
US7796446B2 (en) * 2008-09-19 2010-09-14 Qimonda Ag Memory dies for flexible use and method for configuring memory dies
US8134852B2 (en) * 2008-10-14 2012-03-13 Mosaid Technologies Incorporated Bridge device architecture for connecting discrete memory devices to a system
US8472199B2 (en) * 2008-11-13 2013-06-25 Mosaid Technologies Incorporated System including a plurality of encapsulated semiconductor chips
US8977809B2 (en) * 2008-11-26 2015-03-10 Micron Technology, Inc. Sharing resources in multi-dice stacks

Also Published As

Publication number Publication date
EP2491589A1 (en) 2012-08-29
US8604593B2 (en) 2013-12-10
US20140097891A1 (en) 2014-04-10
WO2011047470A1 (en) 2011-04-28
JP2013508941A (ja) 2013-03-07
US9117685B2 (en) 2015-08-25
CN102227806A (zh) 2011-10-26
EP2491589A4 (en) 2015-07-22
TWI476889B (zh) 2015-03-11
TW201126682A (en) 2011-08-01
US20110090004A1 (en) 2011-04-21

Similar Documents

Publication Publication Date Title
KR20120085650A (ko) 스택된 멀티-다이 패키지에서의 관통 실리콘 비아 재구성
US10505548B1 (en) Multi-chip structure having configurable network-on-chip
US8737105B2 (en) Bridge device architecture for connecting discrete memory devices to a system
KR101858578B1 (ko) 이종 칩들을 포함하는 반도체 패키지 및 이를 포함하는 메모리 시스템
US8630287B2 (en) Multiple core network device with core redundancy
US10346325B2 (en) Ring bus architecture for use in a memory module
KR20180035175A (ko) 반도체 장치
KR20130000241A (ko) 칩 선택 회로 및 이를 포함하는 반도체 장치
US11637903B2 (en) Memory device with a multi-mode communication mechanism
KR100818298B1 (ko) 가변 시리얼 정합 방식의 메모리 시스템 및 그 메모리액세스 방법
CN112041830B (zh) 通信接口与封装结构
US20150039813A1 (en) NAND Interface Capacity Extender Device For Extending Solid State Drives Capacity, Performance, And Reliability
CN115509969A (zh) 多芯片间的存储控制电路
US10565143B2 (en) Circuitry to alleviate printed circuit board routing congestion
US7920433B2 (en) Method and apparatus for storage device with a logic unit and method for manufacturing same
KR100910944B1 (ko) 제어 신호를 공유하는 플래시 메모리 제어 장치 및 방법
US20150160890A1 (en) Memory multi-chip package (mcp) with integral bus splitter

Legal Events

Date Code Title Description
PA0105 International application

St.27 status event code: A-0-1-A10-A15-nap-PA0105

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

PN2301 Change of applicant

St.27 status event code: A-3-3-R10-R13-asn-PN2301

St.27 status event code: A-3-3-R10-R11-asn-PN2301

R18-X000 Changes to party contact information recorded

St.27 status event code: A-3-3-R10-R18-oth-X000

PC1203 Withdrawal of no request for examination

St.27 status event code: N-1-6-B10-B12-nap-PC1203

WITN Application deemed withdrawn, e.g. because no request for examination was filed or no examination fee was paid
R18-X000 Changes to party contact information recorded

St.27 status event code: A-3-3-R10-R18-oth-X000

R18-X000 Changes to party contact information recorded

St.27 status event code: A-3-3-R10-R18-oth-X000