JP2013093535A - 無収縮セラミック基板及びその製造方法 - Google Patents

無収縮セラミック基板及びその製造方法 Download PDF

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Publication number
JP2013093535A
JP2013093535A JP2012000131A JP2012000131A JP2013093535A JP 2013093535 A JP2013093535 A JP 2013093535A JP 2012000131 A JP2012000131 A JP 2012000131A JP 2012000131 A JP2012000131 A JP 2012000131A JP 2013093535 A JP2013093535 A JP 2013093535A
Authority
JP
Japan
Prior art keywords
ceramic substrate
shrinkable
substrate according
layer
ceramic
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2012000131A
Other languages
English (en)
Japanese (ja)
Inventor
Je Hong Sung
ホング サング、ジェ
Yoon Hyuck Choi
ヒュク チョイ、ユン
Ki Young Kim
ヤング キム、キ
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Samsung Electro Mechanics Co Ltd
Original Assignee
Samsung Electro Mechanics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electro Mechanics Co Ltd filed Critical Samsung Electro Mechanics Co Ltd
Publication of JP2013093535A publication Critical patent/JP2013093535A/ja
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4611—Manufacturing multilayer circuits by laminating two or more circuit boards
    • H05K3/4626—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials
    • H05K3/4629—Manufacturing multilayer circuits by laminating two or more circuit boards characterised by the insulating layers or materials laminating inorganic sheets comprising printed circuits, e.g. green ceramic sheets
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/09—Use of materials for the conductive, e.g. metallic pattern
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/11—Printed elements for providing electric connections to or between printed circuits
    • H05K1/115—Via connections; Lands around holes or via connections
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
    • H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
    • H05K3/061—Etching masks
    • H05K3/064—Photoresists
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/26—Cleaning or polishing of the conductive pattern

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Inorganic Chemistry (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Manufacturing Of Printed Wiring (AREA)
JP2012000131A 2011-10-25 2012-01-04 無収縮セラミック基板及びその製造方法 Pending JP2013093535A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR10-2011-0109186 2011-10-25
KR1020110109186A KR101288163B1 (ko) 2011-10-25 2011-10-25 무수축 세라믹 기판 및 이의 제조 방법

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2015013470A Division JP2015092629A (ja) 2011-10-25 2015-01-27 無収縮セラミック基板及びその製造方法

Publications (1)

Publication Number Publication Date
JP2013093535A true JP2013093535A (ja) 2013-05-16

Family

ID=48616424

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2012000131A Pending JP2013093535A (ja) 2011-10-25 2012-01-04 無収縮セラミック基板及びその製造方法
JP2015013470A Pending JP2015092629A (ja) 2011-10-25 2015-01-27 無収縮セラミック基板及びその製造方法

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2015013470A Pending JP2015092629A (ja) 2011-10-25 2015-01-27 無収縮セラミック基板及びその製造方法

Country Status (2)

Country Link
JP (2) JP2013093535A (ko)
KR (1) KR101288163B1 (ko)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014122813A1 (ja) * 2013-02-08 2014-08-14 株式会社村田製作所 積層型インダクタ素子およびｄｃ－ｄｃコンバータモジュール
JP2014236026A (ja) * 2013-05-31 2014-12-15 日本特殊陶業株式会社 セラミック基板の製造方法

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04116891A (ja) * 1990-09-06 1992-04-17 Fujitsu Ltd 配線基板におけるヴィアの形成方法
JP2001291946A (ja) * 2000-04-04 2001-10-19 Fujitsu Ltd 薄膜配線基板の製造方法および薄膜配線基板
JP2007173686A (ja) * 2005-12-26 2007-07-05 Tokyo Electron Ltd ダマシン配線の形成方法
JP2010278409A (ja) * 2009-05-28 2010-12-09 Samsung Electro-Mechanics Co Ltd 多層セラミック基板及びその製造方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0557278B1 (en) * 1990-11-15 1994-12-07 International Business Machines Corporation A method of making a multilayer thin film structure
JP2001053453A (ja) 1999-08-06 2001-02-23 Tdk Corp 多層基板、高周波モジュール及びその製造方法
US6916670B2 (en) * 2003-02-04 2005-07-12 International Business Machines Corporation Electronic package repair process
JP4613878B2 (ja) * 2006-05-23 2011-01-19 Ｔｄｋ株式会社 積層基板及びその製造方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH04116891A (ja) * 1990-09-06 1992-04-17 Fujitsu Ltd 配線基板におけるヴィアの形成方法
JP2001291946A (ja) * 2000-04-04 2001-10-19 Fujitsu Ltd 薄膜配線基板の製造方法および薄膜配線基板
JP2007173686A (ja) * 2005-12-26 2007-07-05 Tokyo Electron Ltd ダマシン配線の形成方法
JP2010278409A (ja) * 2009-05-28 2010-12-09 Samsung Electro-Mechanics Co Ltd 多層セラミック基板及びその製造方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2014122813A1 (ja) * 2013-02-08 2014-08-14 株式会社村田製作所 積層型インダクタ素子およびｄｃ－ｄｃコンバータモジュール
JP2014236026A (ja) * 2013-05-31 2014-12-15 日本特殊陶業株式会社 セラミック基板の製造方法

Also Published As

Publication number Publication date
JP2015092629A (ja) 2015-05-14
KR20130044864A (ko) 2013-05-03
KR101288163B1 (ko) 2013-07-18

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