JP2012522369A - ソース/ドレイン延長部、ハローポケット及びゲート誘電体厚さの異なる構成を有する同極性の電界効果トランジスタの構成及び製造 - Google Patents
ソース/ドレイン延長部、ハローポケット及びゲート誘電体厚さの異なる構成を有する同極性の電界効果トランジスタの構成及び製造 Download PDFInfo
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- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
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- H10D30/0221—Manufacture or treatment of FETs having insulated gates [IGFET] having asymmetry in the channel direction, e.g. lateral high-voltage MISFETs having drain offset region or extended-drain MOSFETs [EDMOS]
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- H10D30/603—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs having asymmetry in the channel direction, e.g. lateral high-voltage MISFETs having drain offset region or extended drain IGFETs [EDMOS]
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- H10D62/113—Isolations within a component, i.e. internal isolations
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- H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
- H10D62/213—Channel regions of field-effect devices
- H10D62/221—Channel regions of field-effect devices of FETs
- H10D62/235—Channel regions of field-effect devices of FETs of IGFETs
- H10D62/299—Channel regions of field-effect devices of FETs of IGFETs having lateral doping variations
- H10D62/307—Channel regions of field-effect devices of FETs of IGFETs having lateral doping variations the doping variations being parallel to the channel lengths
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- H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
- H10D62/351—Substrate regions of field-effect devices
- H10D62/357—Substrate regions of field-effect devices of FETs
- H10D62/364—Substrate regions of field-effect devices of FETs of IGFETs
- H10D62/371—Inactive supplementary semiconductor regions, e.g. for preventing punch-through, improving capacity effect or leakage current
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- H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
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- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
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- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
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- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
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- H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
- H10D62/213—Channel regions of field-effect devices
- H10D62/221—Channel regions of field-effect devices of FETs
- H10D62/235—Channel regions of field-effect devices of FETs of IGFETs
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- H10D64/68—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator
- H10D64/693—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes characterised by the insulator, e.g. by the gate insulator the insulator comprising nitrogen, e.g. nitrides, oxynitrides or nitrogen-doped materials
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- H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
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- H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
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- H10D84/82—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components
- H10D84/83—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers characterised by the integration of at least one component covered by groups H10D12/00 or H10D30/00, e.g. integration of IGFETs of only field-effect components of only insulated-gate FETs [IGFET]
- H10D84/85—Complementary IGFETs, e.g. CMOS
- H10D84/856—Complementary IGFETs, e.g. CMOS the complementary IGFETs having different architectures than each other, e.g. high-voltage and low-voltage CMOS
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- H10P30/222—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the angle between the ion beam and the crystal planes or the main crystal surface
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- H10P30/225—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping of a molecular ion, e.g. decaborane
Landscapes
- Insulated Gate Type Field-Effect Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Thin Film Transistor (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/382,971 | 2009-03-27 | ||
| US12/382,971 US8084827B2 (en) | 2009-03-27 | 2009-03-27 | Structure and fabrication of like-polarity field-effect transistors having different configurations of source/drain extensions, halo pockets, and gate dielectric thicknesses |
| PCT/US2010/000898 WO2010110902A1 (en) | 2009-03-27 | 2010-03-25 | Structure and fabrication of like-polarity field-effect transistors having different configurations of source/drain extensions, halo pockets, and gate dielectric thicknesses |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2012522369A true JP2012522369A (ja) | 2012-09-20 |
| JP2012522369A5 JP2012522369A5 (https=) | 2013-05-09 |
Family
ID=42781346
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2012502017A Pending JP2012522369A (ja) | 2009-03-27 | 2010-03-25 | ソース/ドレイン延長部、ハローポケット及びゲート誘電体厚さの異なる構成を有する同極性の電界効果トランジスタの構成及び製造 |
Country Status (7)
| Country | Link |
|---|---|
| US (2) | US8084827B2 (https=) |
| EP (1) | EP2412016A4 (https=) |
| JP (1) | JP2012522369A (https=) |
| KR (1) | KR20110133622A (https=) |
| CN (1) | CN102365730A (https=) |
| TW (1) | TW201101463A (https=) |
| WO (1) | WO2010110902A1 (https=) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8482076B2 (en) | 2009-09-16 | 2013-07-09 | International Business Machines Corporation | Method and structure for differential silicide and recessed or raised source/drain to improve field effect transistor |
| US20110291193A1 (en) * | 2010-05-27 | 2011-12-01 | International Business Machines Corporation | High density butted junction cmos inverter, and making and layout of same |
| JP6043193B2 (ja) * | 2013-01-28 | 2016-12-14 | 株式会社東芝 | トンネルトランジスタ |
| KR102180554B1 (ko) | 2013-12-04 | 2020-11-19 | 삼성디스플레이 주식회사 | 박막 트랜지스터 및 이의 제조 방법 |
| US9324783B2 (en) * | 2014-09-30 | 2016-04-26 | Infineon Technologies Ag | Soft switching semiconductor device and method for producing thereof |
| CN109980009B (zh) * | 2017-12-28 | 2020-11-03 | 无锡华润上华科技有限公司 | 一种半导体器件的制造方法和集成半导体器件 |
| CN109980010B (zh) * | 2017-12-28 | 2020-10-13 | 无锡华润上华科技有限公司 | 一种半导体器件的制造方法和集成半导体器件 |
| FR3099638A1 (fr) * | 2019-07-31 | 2021-02-05 | Stmicroelectronics (Rousset) Sas | Procédé de fabrication comprenant une définition d’une longueur effective de canal de transistors MOSFET |
| US11455452B2 (en) * | 2019-09-23 | 2022-09-27 | Texas Instruments Incorporated | Variable implant and wafer-level feed-forward for dopant dose optimization |
| CN111785777B (zh) * | 2020-06-28 | 2023-10-20 | 上海华虹宏力半导体制造有限公司 | 高压cmos器件及其制造方法 |
| US20260090079A1 (en) * | 2024-09-23 | 2026-03-26 | Apple Inc. | Low Noise Stacked Field Effect Transistor Design |
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- 2010-03-25 WO PCT/US2010/000898 patent/WO2010110902A1/en not_active Ceased
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- 2010-03-25 JP JP2012502017A patent/JP2012522369A/ja active Pending
- 2010-03-25 CN CN2010800138539A patent/CN102365730A/zh active Pending
- 2010-03-25 KR KR1020117025429A patent/KR20110133622A/ko not_active Withdrawn
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Also Published As
| Publication number | Publication date |
|---|---|
| EP2412016A1 (en) | 2012-02-01 |
| US8084827B2 (en) | 2011-12-27 |
| CN102365730A (zh) | 2012-02-29 |
| US8377768B2 (en) | 2013-02-19 |
| KR20110133622A (ko) | 2011-12-13 |
| TW201101463A (en) | 2011-01-01 |
| US20100244149A1 (en) | 2010-09-30 |
| WO2010110902A1 (en) | 2010-09-30 |
| US20120264263A1 (en) | 2012-10-18 |
| EP2412016A4 (en) | 2014-03-19 |
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