JP2012174984A - パターン形成方法 - Google Patents
パターン形成方法 Download PDFInfo
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- JP2012174984A JP2012174984A JP2011037273A JP2011037273A JP2012174984A JP 2012174984 A JP2012174984 A JP 2012174984A JP 2011037273 A JP2011037273 A JP 2011037273A JP 2011037273 A JP2011037273 A JP 2011037273A JP 2012174984 A JP2012174984 A JP 2012174984A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
- H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
- H01L21/033—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers
- H01L21/0334—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/0337—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising inorganic layers characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00023—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems without movable or flexible elements
- B81C1/00031—Regular or irregular arrays of nanoscale structures, e.g. etch mask layer
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- G—PHYSICS
- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/004—Photosensitive materials
- G03F7/075—Silicon-containing compounds
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- G—PHYSICS
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- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
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- G—PHYSICS
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- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
- G03F7/00—Photomechanical, e.g. photolithographic, production of textured or patterned surfaces, e.g. printing surfaces; Materials therefor, e.g. comprising photoresists; Apparatus specially adapted therefor
- G03F7/26—Processing photosensitive materials; Apparatus therefor
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
- H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
- H01L21/3083—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane
- H01L21/3086—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their size, orientation, disposition, behaviour, shape, in horizontal or vertical plane characterised by the process involved to create the mask, e.g. lift-off masks, sidewalls, or to modify the mask, e.g. pre-treatment, post-treatment
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- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C2201/00—Manufacture or treatment of microstructural devices or systems
- B81C2201/01—Manufacture or treatment of microstructural devices or systems in or on a substrate
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- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
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Abstract
【解決手段】実施形態によれば、基板上に高分子膜を形成し、前記高分子膜に対して選択的に第1および第2の条件でエネルギー線を照射することにより、前記高分子膜表面に、表面自由エネルギーの異なる第1および第2の領域を形成し、前記高分子膜上に、第1および第2のブロック鎖を含むブロックコポリマー層を形成し、前記ブロックコポリマーをミクロ相分離させることを特徴とするパターン形成方法が提供される。
【選択図】 図1
Description
シリコンウエハーの表面をUV洗浄機で5分間処理した。シラノール置換架橋型ポリシラン(大阪ガスケミカル社製 オグソールSI−20)をプロピレングリコールモノメチルエーテルアセテートに溶解して1w/w%溶液を調製し、この溶液をスピンコートによりシリコンウエハー上に塗布することにより高分子膜を形成した。水銀ランプを照射し、高分子膜上に露光部および未露光部のパターンを形成した後、250℃で30分、ベーカーにより加熱した。
シリコンウエハーの表面をUV洗浄機で5分間処理した。シラノール置換架橋型ポリシラン(大阪ガスケミカル社製 オグソールSI−20)をプロピレングリコールモノメチルエーテルアセテートに溶解して1%溶液を調製し、この溶液をスピンコートによりシリコンウエハー上に塗布し、110℃で90秒加熱した。その後、10および100μm角のマスク部を配置したレチクルをポリシラン膜上に配置し、水銀ランプで10秒露光して、露光部および未露光部のパターンを形成した。露光部における水の接触角は80°であり、未露光部における水の接触角は83°であった。その後、250℃で30分、ベーカーにより加熱した。
露光時間を120秒とした以外は、実施例2と同様に実験を行った。露光部における水の接触角は79°であり、未露光部における水の接触角は83°であった。その結果、マスクにより遮光された部分では、基板に垂直なラメラ相が観察され、露光部では基板に平行なラメラ相が観察された。
用いるブロックコポリマーをP2813−SMMAとした以外は、実施例3と同様に実験を行った。P2813−SMMAは、PSブロックとPMMAブロックの数平均分子量(Mn)がそれぞれ130000および133000であり、分散度(Mw/Mn)は1.1である。露光部における水の接触角は79°であり、未露光部における水の接触角は83°であった。このように実験を行うと、マスクに遮光された部分では、基板に垂直なラメラ相が観察され、露光部では基板に平行なラメラ相が観察される。
用いるブロックコポリマーをP3964−SMMAとした以外は、実施例3と同様に実験を行った。
水銀ランプでの露光の代わりにArFエキシマレーザーステッパーを用い、透過部と不透過部が1μmの間隔で交互かつライン状に形成されたマスクを通じて露光量500mJ/cm2で露光する以外は、実施例2と同様に実験を行うと、露光部における水の接触角は76°であり、未露光部における水の接触角は83°となる。その結果、図2(a)に示すように、マスクに遮光された未露光部分22では基板に垂直なラメラ相が形成され、PSブロックの層22aとPMMAブロックの層22bとが交互に並んでいることが確認できる。一方、露光部21では基板に平行なラメラ相が形成される。
水銀ランプでの露光の代わりにKrFエキシマレーザーステッパーを用い、透過部と不透過部が1μmの間隔で交互かつライン状に形成されたマスクを通じて露光量500mJ/cm2で露光する以外は、実施例2と同様に実験を行うと、露光部における水の接触角は76°であり、未露光部における水の接触角は83°となる。その結果、図2(a)に示すような相分離パターンとなる。
Claims (12)
- 基板上に高分子膜を形成し、
前記高分子膜に対して選択的に第1および第2の条件でエネルギー線を照射することにより、前記高分子膜表面に、表面自由エネルギーの異なる第1および第2の領域を形成し、
前記高分子膜上に、第1および第2のブロック鎖を含むブロックコポリマー層を形成し、
前記ブロックコポリマーをミクロ相分離させ、前記第1および第2の領域の表面自由エネルギーに基づいて、前記第1および第2のブロック鎖を前記基板に対して垂直または平行に配向させることにより、前記第1の領域上のブロックコポリマー層と前記第2の領域上のブロックコポリマー層とで異なるミクロ相分離パターンを同時に形成する
ことを特徴とするパターン形成方法。 - 前記ミクロ相分離パターンは、前記第1および第2のブロック鎖の配向により形成される第1および第2のブロック鎖のミクロ相分離層を含むラメラ相またはシリンダー相であることを特徴とする請求項1に記載のパターン形成方法。
- 前記ミクロ相分離パターンは、前記第1の領域上では、前記第1および第2のブロック鎖の層が前記基板に対して垂直に交互に積層されたラメラ相であり、前記第2の領域上では、前記第1および第2のブロック鎖の層が前記基板に対して平行に交互に積層されたラメラ相であることを特徴とする請求項2に記載のパターン形成方法。
- 前記第1のブロック鎖はポリスチレンからなり、前記第2のブロック鎖はポリメチルメタクリレートからなり、前記第1の領域上における水の接触角は80°より大きく90°未満であり、前記第2の領域上における水の接触角は75〜80°または90°以上であることを特徴とする、請求項3に記載のパターン形成方法。
- 前記第1または第2のブロック鎖のパターンを選択的に除去し、残存した前記第2または第1のブロック鎖のパターンをエッチングマスクとして用いることを特徴とする請求項1に記載のパターン形成方法。
- 前記高分子は、ケイ素系材料であることを特徴とする請求項1に記載のパターン形成方法。
- 前記ケイ素系材料は、ポリシランであることを特徴とする請求項6に記載のパターン形成方法。
- 基板と、
基板上に形成された高分子膜と、
第1および第2のブロック鎖を含むブロックコポリマーの層であって、前記第1および第2のブロック鎖の配向により形成される第1および第2のブロック鎖の層が前記基板に対して垂直に交互に積層された第1のラメラ相と、前記第1および第2のブロック鎖の層が前記基板に対して平行に交互に積層された第2のラメラ相とを含むブロックコポリマー層と
を具備することを特徴とする、請求項3に記載のパターン形成方法により得られる構造体。 - 前記第1のラメラ相における前記第1および第2のブロック鎖の層は、前記第1のラメラ相と前記第2のラメラ相の界面に対して垂直に並ぶことを特徴とする請求項8に記載の構造体。
- 前記第1のラメラ相における前記第1および第2のブロック鎖の層は、前記第1のラメラ相と前記第2のラメラ相の界面に対して平行に並ぶことを特徴とする請求項8に記載の構造体。
- 前記高分子は、ケイ素系材料であることを特徴とする請求項8に記載の構造体。
- 前記ケイ素系材料は、ポリシランであることを特徴とする請求項11に記載の構造体。
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US20120214094A1 (en) | 2012-08-23 |
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US8808973B2 (en) | 2014-08-19 |
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