JP2011512040A5 - - Google Patents

Download PDF

Info

Publication number
JP2011512040A5
JP2011512040A5 JP2010546411A JP2010546411A JP2011512040A5 JP 2011512040 A5 JP2011512040 A5 JP 2011512040A5 JP 2010546411 A JP2010546411 A JP 2010546411A JP 2010546411 A JP2010546411 A JP 2010546411A JP 2011512040 A5 JP2011512040 A5 JP 2011512040A5
Authority
JP
Japan
Prior art keywords
semiconductor substrate
substrate
oxide
artificial
free
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2010546411A
Other languages
English (en)
Japanese (ja)
Other versions
JP2011512040A (ja
Filing date
Publication date
Priority claimed from EP08290138A external-priority patent/EP2091070A1/en
Application filed filed Critical
Publication of JP2011512040A publication Critical patent/JP2011512040A/ja
Publication of JP2011512040A5 publication Critical patent/JP2011512040A5/ja
Withdrawn legal-status Critical Current

Links

JP2010546411A 2008-02-13 2009-01-23 半導体基板表面処理方法 Withdrawn JP2011512040A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
EP08290138A EP2091070A1 (en) 2008-02-13 2008-02-13 Semiconductor substrate surface preparation method
PCT/IB2009/000141 WO2009101494A1 (en) 2008-02-13 2009-01-23 Semiconductor substrate surface preparation method

Publications (2)

Publication Number Publication Date
JP2011512040A JP2011512040A (ja) 2011-04-14
JP2011512040A5 true JP2011512040A5 (enExample) 2011-09-15

Family

ID=39638664

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2010546411A Withdrawn JP2011512040A (ja) 2008-02-13 2009-01-23 半導体基板表面処理方法

Country Status (6)

Country Link
US (1) US8062957B2 (enExample)
EP (2) EP2091070A1 (enExample)
JP (1) JP2011512040A (enExample)
KR (1) KR20100114884A (enExample)
CN (1) CN101952934A (enExample)
WO (1) WO2009101494A1 (enExample)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4894390B2 (ja) * 2006-07-25 2012-03-14 信越半導体株式会社 半導体基板の製造方法
JP6030455B2 (ja) * 2013-01-16 2016-11-24 東京エレクトロン株式会社 シリコン酸化物膜の成膜方法
EP3028295B1 (de) 2013-09-25 2020-10-21 Ev Group E. Thallner GmbH Verfahren zum bonden von substraten
JP2015233130A (ja) * 2014-05-16 2015-12-24 株式会社半導体エネルギー研究所 半導体基板および半導体装置の作製方法
US10964664B2 (en) * 2018-04-20 2021-03-30 Invensas Bonding Technologies, Inc. DBI to Si bonding for simplified handle wafer
JP2020057810A (ja) * 2019-12-23 2020-04-09 エーファウ・グループ・エー・タルナー・ゲーエムベーハー 基板をボンディングする装置および方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5238865A (en) * 1990-09-21 1993-08-24 Nippon Steel Corporation Process for producing laminated semiconductor substrate
EP1179842A3 (en) * 1992-01-31 2002-09-04 Canon Kabushiki Kaisha Semiconductor substrate and method for preparing same
JP3116628B2 (ja) * 1993-01-21 2000-12-11 株式会社日本自動車部品総合研究所 吸着装置
JP2978748B2 (ja) * 1995-11-22 1999-11-15 日本電気株式会社 半導体装置の製造方法
US6007641A (en) * 1997-03-14 1999-12-28 Vlsi Technology, Inc. Integrated-circuit manufacture method with aqueous hydrogen-fluoride and nitric-acid oxide etch
TW460617B (en) * 1998-11-06 2001-10-21 United Microelectronics Corp Method for removing carbon contamination on surface of semiconductor substrate
US6709989B2 (en) * 2001-06-21 2004-03-23 Motorola, Inc. Method for fabricating a semiconductor structure including a metal oxide interface with silicon
JP2004266075A (ja) * 2003-02-28 2004-09-24 Tokyo Electron Ltd 基板処理方法
US6911375B2 (en) * 2003-06-02 2005-06-28 International Business Machines Corporation Method of fabricating silicon devices on sapphire with wafer bonding at low temperature
EP1667214B1 (en) * 2003-09-10 2012-03-21 Shin-Etsu Handotai Co., Ltd. Method for cleaning a multilayer substrate and method for bonding substrates and method for producing bonded wafer

Similar Documents

Publication Publication Date Title
JP2011512040A5 (enExample)
SG154396A1 (en) Strain-direct-on-insulator (sdoi) substrate and method of forming
JP2013138248A5 (enExample)
JP2009173950A5 (enExample)
JP2010272851A5 (enExample)
JP2010161339A5 (enExample)
TWI456689B (zh) Ｓｏｉ晶圓的製造方法
JP2009111373A5 (enExample)
TW200739671A (en) Method and structure for fabricating bonded substrates structure using thermal processing to remove oxygen species
WO2005079198A3 (en) Wafer bonded virtual substrate and method for forming the same
JP2010534935A5 (enExample)
JP2006191029A5 (enExample)
CN103832970A (zh) 一种低温晶圆键合方法
JP2006080314A5 (enExample)
JP2010500761A5 (enExample)
EP1978554A3 (en) Method for manufacturing semiconductor substrate comprising implantation and separation steps
SG166738A1 (en) Method for manufacturing soi substrate and soi substrate
ATE497419T1 (de) Draht- und lötverbindungsherstellungsverfahren
EP2211380A3 (en) Method of Manufacturing Laminated Wafer by High Temperature Laminating Method
JP2010283337A5 (enExample)
WO2010102089A3 (en) Methods for depositing layers having reduced interfacial contamination
WO2010127320A3 (en) Methods for wafer bonding, and for nucleating bonding nanophases
JP2005311199A5 (enExample)
WO2009011152A1 (ja) Ｓｏｉ基板およびｓｏｉ基板を用いた半導体装置
SG162813A1 (en) Double plasma utbox