JP2011066158A - 半導体装置およびその製造方法 - Google Patents

半導体装置およびその製造方法 Download PDF

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Publication number
JP2011066158A
JP2011066158A JP2009214865A JP2009214865A JP2011066158A JP 2011066158 A JP2011066158 A JP 2011066158A JP 2009214865 A JP2009214865 A JP 2009214865A JP 2009214865 A JP2009214865 A JP 2009214865A JP 2011066158 A JP2011066158 A JP 2011066158A
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Japan
Prior art keywords
region
gate electrode
drain region
source region
semiconductor device
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Pending
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JP2009214865A
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English (en)
Japanese (ja)
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JP2011066158A5 (https=
Inventor
Hiromichi Yoshinaga
博路 吉永
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Toshiba Corp
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Toshiba Corp
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Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2009214865A priority Critical patent/JP2011066158A/ja
Priority to US12/874,172 priority patent/US20110062517A1/en
Publication of JP2011066158A publication Critical patent/JP2011066158A/ja
Publication of JP2011066158A5 publication Critical patent/JP2011066158A5/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/601—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs 
    • H10D30/603—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs  having asymmetry in the channel direction, e.g. lateral high-voltage MISFETs having drain offset region or extended drain IGFETs [EDMOS]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0221—Manufacture or treatment of FETs having insulated gates [IGFET] having asymmetry in the channel direction, e.g. lateral high-voltage MISFETs having drain offset region or extended-drain MOSFETs [EDMOS]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/20—Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27—Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311—Gate electrodes for field-effect devices
    • H10D64/411—Gate electrodes for field-effect devices for FETs
    • H10D64/511—Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/517—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers
    • H10D64/518—Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers characterised by their lengths or sectional shapes
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0212—Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10—Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17—Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/351—Substrate regions of field-effect devices
    • H10D62/357—Substrate regions of field-effect devices of FETs
    • H10D62/364—Substrate regions of field-effect devices of FETs of IGFETs
    • H10D62/371—Inactive supplementary semiconductor regions, e.g. for preventing punch-through, improving capacity effect or leakage current
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00—Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83—Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/01—Manufacture or treatment
    • H10D64/013—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator
    • H10D64/01302—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H10D64/01304—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H10D64/01324—Manufacture or treatment of electrodes having a conductor capacitively coupled to a semiconductor by an insulator the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor characterised by the sectional shape, e.g. T or inverted-T
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/62—Electrodes ohmically coupled to a semiconductor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/661—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation
    • H10D64/662—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation the conductor further comprising additional layers, e.g. multiple silicon layers having different crystal structures
    • H10D64/663—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation the conductor further comprising additional layers, e.g. multiple silicon layers having different crystal structures the additional layers comprising a silicide layer contacting the layer of silicon, e.g. polycide gates
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/22—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping using masks
    • H10P30/221—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping using masks characterised by the angle between the ion beam and the mask
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P30/00—Ion implantation into wafers, substrates or parts of devices
    • H10P30/20—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping
    • H10P30/222—Ion implantation into wafers, substrates or parts of devices into semiconductor materials, e.g. for doping characterised by the angle between the ion beam and the crystal planes or the main crystal surface

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  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
JP2009214865A 2009-09-16 2009-09-16 半導体装置およびその製造方法 Pending JP2011066158A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2009214865A JP2011066158A (ja) 2009-09-16 2009-09-16 半導体装置およびその製造方法
US12/874,172 US20110062517A1 (en) 2009-09-16 2010-09-01 Semiconductor device and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009214865A JP2011066158A (ja) 2009-09-16 2009-09-16 半導体装置およびその製造方法

Publications (2)

Publication Number Publication Date
JP2011066158A true JP2011066158A (ja) 2011-03-31
JP2011066158A5 JP2011066158A5 (https=) 2011-10-27

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ID=43729649

Family Applications (1)

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JP2009214865A Pending JP2011066158A (ja) 2009-09-16 2009-09-16 半導体装置およびその製造方法

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Country Link
US (1) US20110062517A1 (https=)
JP (1) JP2011066158A (https=)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013030774A (ja) * 2011-07-26 2013-02-07 General Electric Co <Ge> 炭化ケイ素ｍｏｓｆｅｔセル構造およびその形成方法
JP2017005208A (ja) * 2015-06-15 2017-01-05 株式会社豊田中央研究所 半導体装置

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9887288B2 (en) * 2015-12-02 2018-02-06 Texas Instruments Incorporated LDMOS device with body diffusion self-aligned to gate
US9941171B1 (en) * 2016-11-18 2018-04-10 Monolithic Power Systems, Inc. Method for fabricating LDMOS with reduced source region
US11705490B2 (en) * 2021-02-08 2023-07-18 Applied Materials, Inc. Graded doping in power devices
US12532537B2 (en) * 2022-08-03 2026-01-20 Vanguard International Semiconductor Corporation Semiconductor device with a deep trench isolation structure and buried layers for reducing substrate leakage current and avoiding latch-up effect, and fabrication method thereof

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63291471A (ja) * 1987-05-25 1988-11-29 Toshiba Corp 半導体装置の製造方法
JPH09306866A (ja) * 1996-05-16 1997-11-28 Sony Corp 半導体装置の製造方法
JPH1098189A (ja) * 1996-07-31 1998-04-14 Lg Semicon Co Ltd 電界効果トランジスタ及びその製造方法
JP2001168210A (ja) * 1999-10-27 2001-06-22 Texas Instr Inc <Ti> 集積回路用ドレイン拡張型トランジスタ
JP2002270825A (ja) * 2001-03-08 2002-09-20 Hitachi Ltd 電界効果トランジスタ及び半導体装置の製造方法
JP2003209121A (ja) * 2002-01-16 2003-07-25 Mitsubishi Electric Corp 半導体装置の製造方法
JP2004014574A (ja) * 2002-06-03 2004-01-15 Semiconductor Leading Edge Technologies Inc 半導体装置の製造方法
JP2005327827A (ja) * 2004-05-13 2005-11-24 Renesas Technology Corp 半導体装置およびその製造方法
JP2009124085A (ja) * 2007-11-19 2009-06-04 Toshiba Corp 半導体装置
JP2009164460A (ja) * 2008-01-09 2009-07-23 Renesas Technology Corp 半導体装置

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100510541B1 (ko) * 2003-08-11 2005-08-26 삼성전자주식회사 고전압 트랜지스터 및 그 제조 방법
US7125777B2 (en) * 2004-07-15 2006-10-24 Fairchild Semiconductor Corporation Asymmetric hetero-doped high-voltage MOSFET (AH2MOS)
JP4703196B2 (ja) * 2005-01-18 2011-06-15 株式会社東芝 半導体装置

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63291471A (ja) * 1987-05-25 1988-11-29 Toshiba Corp 半導体装置の製造方法
JPH09306866A (ja) * 1996-05-16 1997-11-28 Sony Corp 半導体装置の製造方法
JPH1098189A (ja) * 1996-07-31 1998-04-14 Lg Semicon Co Ltd 電界効果トランジスタ及びその製造方法
JP2001168210A (ja) * 1999-10-27 2001-06-22 Texas Instr Inc <Ti> 集積回路用ドレイン拡張型トランジスタ
JP2002270825A (ja) * 2001-03-08 2002-09-20 Hitachi Ltd 電界効果トランジスタ及び半導体装置の製造方法
JP2003209121A (ja) * 2002-01-16 2003-07-25 Mitsubishi Electric Corp 半導体装置の製造方法
JP2004014574A (ja) * 2002-06-03 2004-01-15 Semiconductor Leading Edge Technologies Inc 半導体装置の製造方法
JP2005327827A (ja) * 2004-05-13 2005-11-24 Renesas Technology Corp 半導体装置およびその製造方法
JP2009124085A (ja) * 2007-11-19 2009-06-04 Toshiba Corp 半導体装置
JP2009164460A (ja) * 2008-01-09 2009-07-23 Renesas Technology Corp 半導体装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013030774A (ja) * 2011-07-26 2013-02-07 General Electric Co <Ge> 炭化ケイ素ｍｏｓｆｅｔセル構造およびその形成方法
JP2017005208A (ja) * 2015-06-15 2017-01-05 株式会社豊田中央研究所 半導体装置

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