JP2011066158A - 半導体装置およびその製造方法 - Google Patents

半導体装置およびその製造方法 Download PDF

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Publication number
JP2011066158A
JP2011066158A JP2009214865A JP2009214865A JP2011066158A JP 2011066158 A JP2011066158 A JP 2011066158A JP 2009214865 A JP2009214865 A JP 2009214865A JP 2009214865 A JP2009214865 A JP 2009214865A JP 2011066158 A JP2011066158 A JP 2011066158A
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JP
Japan
Prior art keywords
region
gate electrode
drain region
source region
semiconductor device
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Pending
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JP2009214865A
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English (en)
Japanese (ja)
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JP2011066158A5 (enExample
Inventor
Hiromichi Yoshinaga
博路 吉永
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
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Toshiba Corp
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Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP2009214865A priority Critical patent/JP2011066158A/ja
Priority to US12/874,172 priority patent/US20110062517A1/en
Publication of JP2011066158A publication Critical patent/JP2011066158A/ja
Publication of JP2011066158A5 publication Critical patent/JP2011066158A5/ja
Pending legal-status Critical Current

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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/60Insulated-gate field-effect transistors [IGFET]
    • H10D30/601Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs 
    • H10D30/603Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs  having asymmetry in the channel direction, e.g. lateral high-voltage MISFETs having drain offset region or extended drain IGFETs [EDMOS]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0221Manufacture or treatment of FETs having insulated gates [IGFET] having asymmetry in the channel direction, e.g. lateral high-voltage MISFETs having drain offset region or extended-drain MOSFETs [EDMOS]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/20Electrodes characterised by their shapes, relative sizes or dispositions 
    • H10D64/27Electrodes not carrying the current to be rectified, amplified, oscillated or switched, e.g. gates
    • H10D64/311Gate electrodes for field-effect devices
    • H10D64/411Gate electrodes for field-effect devices for FETs
    • H10D64/511Gate electrodes for field-effect devices for FETs for IGFETs
    • H10D64/517Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers
    • H10D64/518Gate electrodes for field-effect devices for FETs for IGFETs characterised by the conducting layers characterised by their lengths or sectional shapes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation
    • H01L21/26586Bombardment with radiation with high-energy radiation producing ion implantation characterised by the angle between the ion beam and the crystal planes or the main crystal surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008Making conductor-insulator-semiconductor electrodes
    • H01L21/28017Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28114Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor characterised by the sectional shape, e.g. T, inverted-T
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00Field-effect transistors [FET]
    • H10D30/01Manufacture or treatment
    • H10D30/021Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0212Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/10Shapes, relative sizes or dispositions of the regions of the semiconductor bodies; Shapes of the semiconductor bodies
    • H10D62/17Semiconductor regions connected to electrodes not carrying current to be rectified, amplified or switched, e.g. channel regions
    • H10D62/351Substrate regions of field-effect devices
    • H10D62/357Substrate regions of field-effect devices of FETs
    • H10D62/364Substrate regions of field-effect devices of FETs of IGFETs
    • H10D62/371Inactive supplementary semiconductor regions, e.g. for preventing punch-through, improving capacity effect or leakage current
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D62/00Semiconductor bodies, or regions thereof, of devices having potential barriers
    • H10D62/80Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials
    • H10D62/83Semiconductor bodies, or regions thereof, of devices having potential barriers characterised by the materials being Group IV materials, e.g. B-doped Si or undoped Ge
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/60Electrodes characterised by their materials
    • H10D64/62Electrodes ohmically coupled to a semiconductor
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10DINORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00Electrodes of devices having potential barriers
    • H10D64/60Electrodes characterised by their materials
    • H10D64/66Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/661Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation
    • H10D64/662Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation the conductor further comprising additional layers, e.g. multiple silicon layers having different crystal structures
    • H10D64/663Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of silicon contacting the insulator, e.g. polysilicon having vertical doping variation the conductor further comprising additional layers, e.g. multiple silicon layers having different crystal structures the additional layers comprising a silicide layer contacting the layer of silicon, e.g. polycide gates

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  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Electrodes Of Semiconductors (AREA)
JP2009214865A 2009-09-16 2009-09-16 半導体装置およびその製造方法 Pending JP2011066158A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2009214865A JP2011066158A (ja) 2009-09-16 2009-09-16 半導体装置およびその製造方法
US12/874,172 US20110062517A1 (en) 2009-09-16 2010-09-01 Semiconductor device and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009214865A JP2011066158A (ja) 2009-09-16 2009-09-16 半導体装置およびその製造方法

Publications (2)

Publication Number Publication Date
JP2011066158A true JP2011066158A (ja) 2011-03-31
JP2011066158A5 JP2011066158A5 (enExample) 2011-10-27

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ID=43729649

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JP2009214865A Pending JP2011066158A (ja) 2009-09-16 2009-09-16 半導体装置およびその製造方法

Country Status (2)

Country Link
US (1) US20110062517A1 (enExample)
JP (1) JP2011066158A (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013030774A (ja) * 2011-07-26 2013-02-07 General Electric Co <Ge> 炭化ケイ素mosfetセル構造およびその形成方法
JP2017005208A (ja) * 2015-06-15 2017-01-05 株式会社豊田中央研究所 半導体装置

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9887288B2 (en) * 2015-12-02 2018-02-06 Texas Instruments Incorporated LDMOS device with body diffusion self-aligned to gate
US9941171B1 (en) * 2016-11-18 2018-04-10 Monolithic Power Systems, Inc. Method for fabricating LDMOS with reduced source region
US11705490B2 (en) * 2021-02-08 2023-07-18 Applied Materials, Inc. Graded doping in power devices
US20240047460A1 (en) * 2022-08-03 2024-02-08 Vanguard International Semiconductor Corporation Semiconductor device and fabrication method thereof

Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63291471A (ja) * 1987-05-25 1988-11-29 Toshiba Corp 半導体装置の製造方法
JPH09306866A (ja) * 1996-05-16 1997-11-28 Sony Corp 半導体装置の製造方法
JPH1098189A (ja) * 1996-07-31 1998-04-14 Lg Semicon Co Ltd 電界効果トランジスタ及びその製造方法
JP2001168210A (ja) * 1999-10-27 2001-06-22 Texas Instr Inc <Ti> 集積回路用ドレイン拡張型トランジスタ
JP2002270825A (ja) * 2001-03-08 2002-09-20 Hitachi Ltd 電界効果トランジスタ及び半導体装置の製造方法
JP2003209121A (ja) * 2002-01-16 2003-07-25 Mitsubishi Electric Corp 半導体装置の製造方法
JP2004014574A (ja) * 2002-06-03 2004-01-15 Semiconductor Leading Edge Technologies Inc 半導体装置の製造方法
JP2005327827A (ja) * 2004-05-13 2005-11-24 Renesas Technology Corp 半導体装置およびその製造方法
JP2009124085A (ja) * 2007-11-19 2009-06-04 Toshiba Corp 半導体装置
JP2009164460A (ja) * 2008-01-09 2009-07-23 Renesas Technology Corp 半導体装置

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100510541B1 (ko) * 2003-08-11 2005-08-26 삼성전자주식회사 고전압 트랜지스터 및 그 제조 방법
US7125777B2 (en) * 2004-07-15 2006-10-24 Fairchild Semiconductor Corporation Asymmetric hetero-doped high-voltage MOSFET (AH2MOS)
JP4703196B2 (ja) * 2005-01-18 2011-06-15 株式会社東芝 半導体装置

Patent Citations (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63291471A (ja) * 1987-05-25 1988-11-29 Toshiba Corp 半導体装置の製造方法
JPH09306866A (ja) * 1996-05-16 1997-11-28 Sony Corp 半導体装置の製造方法
JPH1098189A (ja) * 1996-07-31 1998-04-14 Lg Semicon Co Ltd 電界効果トランジスタ及びその製造方法
JP2001168210A (ja) * 1999-10-27 2001-06-22 Texas Instr Inc <Ti> 集積回路用ドレイン拡張型トランジスタ
JP2002270825A (ja) * 2001-03-08 2002-09-20 Hitachi Ltd 電界効果トランジスタ及び半導体装置の製造方法
JP2003209121A (ja) * 2002-01-16 2003-07-25 Mitsubishi Electric Corp 半導体装置の製造方法
JP2004014574A (ja) * 2002-06-03 2004-01-15 Semiconductor Leading Edge Technologies Inc 半導体装置の製造方法
JP2005327827A (ja) * 2004-05-13 2005-11-24 Renesas Technology Corp 半導体装置およびその製造方法
JP2009124085A (ja) * 2007-11-19 2009-06-04 Toshiba Corp 半導体装置
JP2009164460A (ja) * 2008-01-09 2009-07-23 Renesas Technology Corp 半導体装置

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2013030774A (ja) * 2011-07-26 2013-02-07 General Electric Co <Ge> 炭化ケイ素mosfetセル構造およびその形成方法
JP2017005208A (ja) * 2015-06-15 2017-01-05 株式会社豊田中央研究所 半導体装置

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US20110062517A1 (en) 2011-03-17

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