JP2011044560A - マルチチップモジュール及びマルチチップモジュールの製造方法 - Google Patents
マルチチップモジュール及びマルチチップモジュールの製造方法 Download PDFInfo
- Publication number
- JP2011044560A JP2011044560A JP2009191280A JP2009191280A JP2011044560A JP 2011044560 A JP2011044560 A JP 2011044560A JP 2009191280 A JP2009191280 A JP 2009191280A JP 2009191280 A JP2009191280 A JP 2009191280A JP 2011044560 A JP2011044560 A JP 2011044560A
- Authority
- JP
- Japan
- Prior art keywords
- chips
- chip
- package substrate
- lsi
- wiring
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
- H01L23/147—Semiconductor insulating substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76898—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics formed through a semiconductor substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/481—Internal lead connections, e.g. via connections, feedthrough structures
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49822—Multilayer substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49827—Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L25/00—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
- H01L25/03—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
- H01L25/04—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
- H01L25/065—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
- H01L25/0655—Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00 the devices being arranged next to each other
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/0401—Bonding areas specifically adapted for bump connectors, e.g. under bump metallisation [UBM]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/0557—Disposition the external layer being disposed on a via connection of the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/1302—Disposition
- H01L2224/13025—Disposition the bump connector being disposed on a via connection of the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
- H01L2224/13001—Core members of the bump connector
- H01L2224/13099—Material
- H01L2224/131—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron [B], silicon [Si], germanium [Ge], arsenic [As], antimony [Sb], tellurium [Te] and polonium [Po], and alloys thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
- H01L2224/1401—Structure
- H01L2224/1403—Bump connectors having different sizes, e.g. different diameters, heights or widths
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L2224/14—Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors
- H01L2224/141—Disposition
- H01L2224/1418—Disposition being disposed on at least two different sides of the body, e.g. dual array
- H01L2224/14181—On opposite sides of the body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/16235—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation the bump connector connecting to a via metallisation of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/17—Structure, shape, material or disposition of the bump connectors after the connecting process of a plurality of bump connectors
- H01L2224/171—Disposition
- H01L2224/1718—Disposition being disposed on at least two different sides of the body, e.g. dual array
- H01L2224/17181—On opposite sides of the body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/27—Manufacturing methods
- H01L2224/274—Manufacturing methods by blanket deposition of the material of the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73253—Bump and layer connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8119—Arrangement of the bump connectors prior to mounting
- H01L2224/81191—Arrangement of the bump connectors prior to mounting wherein the bump connectors are disposed only on the semiconductor or solid-state body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/8119—Arrangement of the bump connectors prior to mounting
- H01L2224/81194—Lateral distribution of the bump connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
- H01L2224/818—Bonding techniques
- H01L2224/81801—Soldering or alloying
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/12—Structure, shape, material or disposition of the bump connectors prior to the connecting process
- H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01005—Boron [B]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01006—Carbon [C]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01029—Copper [Cu]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01033—Arsenic [As]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01074—Tungsten [W]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01078—Platinum [Pt]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/013—Alloys
- H01L2924/014—Solder alloys
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/102—Material of the semiconductor or solid state bodies
- H01L2924/1025—Semiconducting materials
- H01L2924/10251—Elemental semiconductors, i.e. Group IV
- H01L2924/10253—Silicon [Si]
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15151—Shape the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
Abstract
【解決手段】パッケージ基板10と電気的に接続されたLSIチップ30A〜30Dが、パッケージ基板とは反対側に配置されたシリコンインタポーザ20の配線パターン26aにより接続され、LSIチップの薄膜回路31とシリコンインタポーザ20の配線パターン26aが、LSIチップに貫通形成されたビア穴32を介して、電気的に接続される。これにより、LSIチップそれぞれは、パッケージ基板との電気的な接続を確保しつつ、他のLSIチップとのシリコンインタポーザ20を介した電気的な接続が可能であり、シリコンインタポーザ20の配線パターンをパッケージ基板とは別に、微細パターンとすることができるため、LSIチップ間の間隔を狭めることができる。
【選択図】図1
Description
20 シリコンインタポーザ(配線基板)
26a 配線パターン
30A〜30D チップ(LSIチップ)
30’ チップ構成部材
31 薄膜回路(回路)
32 ビア穴
100 マルチチップモジュール
Claims (5)
- パッケージ基板と、
前記パッケージ基板上に配置され、前記パッケージ基板と電気的に接続された複数のチップと、
前記複数のチップの、前記パッケージ基板とは反対側に配置され、前記複数のチップ間を接続する配線パターンを有する配線基板と、を備え、
前記複数のチップは、前記パッケージ基板側の面に回路を有し、
前記回路と前記配線基板の配線パターンは、前記複数のチップに貫通形成されたビア穴を介して、電気的に接続されていることを特徴とするマルチチップモジュール。 - 前記配線パターンは、半導体製造装置により製造されパターンであることを特徴とする請求項1に記載のマルチチップモジュール。
- 前記複数のチップのうちの少なくとも1つは、他のチップと厚さが異なることを特徴とする請求項1又は2に記載のマルチチップモジュール。
- 前記配線基板は、シリコン基板と、前記配線パターンが形成された絶縁層を有することを特徴とする請求項1〜3のいずれかに記載のマルチチップモジュール。
- 回路が形成された複数のチップ構成部材を、前記回路をパッケージ基板に対向させて、前記パッケージ基板上に配置する工程と、
前記複数のチップ構成部材の前記パッケージ基板とは反対側の面を研磨して各チップ構成部材の研磨面の高さ位置を揃えて、複数のチップを形成する工程と、
前記複数のチップの前記研磨面に配線基板を実装して、当該配線基板が有する配線パターンにより各チップ間を接続する工程と、を含むマルチチップモジュールの製造方法。
Priority Applications (3)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009191280A JP5635247B2 (ja) | 2009-08-20 | 2009-08-20 | マルチチップモジュール |
DE102010036678A DE102010036678A1 (de) | 2009-08-20 | 2010-07-28 | Multichip-Modul und Verfahren zu seiner Herstellung |
US12/857,893 US8368230B2 (en) | 2009-08-20 | 2010-08-17 | Electronic part and method of manufacturing the same |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2009191280A JP5635247B2 (ja) | 2009-08-20 | 2009-08-20 | マルチチップモジュール |
Related Child Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2014018546A Division JP2014078760A (ja) | 2014-02-03 | 2014-02-03 | マルチチップモジュール |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2011044560A true JP2011044560A (ja) | 2011-03-03 |
JP5635247B2 JP5635247B2 (ja) | 2014-12-03 |
Family
ID=43495614
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2009191280A Active JP5635247B2 (ja) | 2009-08-20 | 2009-08-20 | マルチチップモジュール |
Country Status (3)
Country | Link |
---|---|
US (1) | US8368230B2 (ja) |
JP (1) | JP5635247B2 (ja) |
DE (1) | DE102010036678A1 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101436980B1 (ko) * | 2011-12-28 | 2014-09-02 | 브로드콤 코포레이션 | 브릿지 인터포저를 갖는 반도체 패키지 |
Families Citing this family (33)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8823165B2 (en) | 2011-07-12 | 2014-09-02 | Invensas Corporation | Memory module in a package |
US8502390B2 (en) | 2011-07-12 | 2013-08-06 | Tessera, Inc. | De-skewed multi-die packages |
US8513817B2 (en) | 2011-07-12 | 2013-08-20 | Invensas Corporation | Memory module in a package |
US8963334B2 (en) | 2011-08-30 | 2015-02-24 | Taiwan Semiconductor Manufacturing Company, Ltd. | Die-to-die gap control for semiconductor structure and method |
US8610260B2 (en) | 2011-10-03 | 2013-12-17 | Invensas Corporation | Stub minimization for assemblies without wirebonds to package substrate |
EP2769409A1 (en) | 2011-10-03 | 2014-08-27 | Invensas Corporation | Stub minimization for multi-die wirebond assemblies with orthogonal windows |
US8441111B2 (en) | 2011-10-03 | 2013-05-14 | Invensas Corporation | Stub minimization for multi-die wirebond assemblies with parallel windows |
US8653646B2 (en) | 2011-10-03 | 2014-02-18 | Invensas Corporation | Stub minimization using duplicate sets of terminals for wirebond assemblies without windows |
US8436457B2 (en) | 2011-10-03 | 2013-05-07 | Invensas Corporation | Stub minimization for multi-die wirebond assemblies with parallel windows |
US8436477B2 (en) | 2011-10-03 | 2013-05-07 | Invensas Corporation | Stub minimization using duplicate sets of signal terminals in assemblies without wirebonds to package substrate |
JP5887414B2 (ja) | 2011-10-03 | 2016-03-16 | インヴェンサス・コーポレイション | 平行な窓を有するマルチダイのワイヤボンドアセンブリのスタブ最小化 |
WO2013052544A1 (en) | 2011-10-03 | 2013-04-11 | Invensas Corporation | Stub minimization with terminal grids offset from center of package |
US8659142B2 (en) | 2011-10-03 | 2014-02-25 | Invensas Corporation | Stub minimization for wirebond assemblies without windows |
US8519543B1 (en) * | 2012-07-17 | 2013-08-27 | Futurewei Technologies, Inc. | Large sized silicon interposers overcoming the reticle area limitations |
US8848391B2 (en) | 2012-08-27 | 2014-09-30 | Invensas Corporation | Co-support component and microelectronic assembly |
US8787034B2 (en) | 2012-08-27 | 2014-07-22 | Invensas Corporation | Co-support system and microelectronic assembly |
US9368477B2 (en) | 2012-08-27 | 2016-06-14 | Invensas Corporation | Co-support circuit panel and microelectronic packages |
US8848392B2 (en) | 2012-08-27 | 2014-09-30 | Invensas Corporation | Co-support module and microelectronic assembly |
US8866304B2 (en) * | 2012-12-21 | 2014-10-21 | Altera Corporation | Integrated circuit device with stitched interposer |
US9070423B2 (en) | 2013-06-11 | 2015-06-30 | Invensas Corporation | Single package dual channel memory with co-support |
US9508636B2 (en) | 2013-10-16 | 2016-11-29 | Intel Corporation | Integrated circuit package substrate |
US9123555B2 (en) | 2013-10-25 | 2015-09-01 | Invensas Corporation | Co-support for XFD packaging |
US9275955B2 (en) | 2013-12-18 | 2016-03-01 | Intel Corporation | Integrated circuit package with embedded bridge |
US9281296B2 (en) | 2014-07-31 | 2016-03-08 | Invensas Corporation | Die stacking techniques in BGA memory package for small footprint CPU and memory motherboard design |
US9691437B2 (en) | 2014-09-25 | 2017-06-27 | Invensas Corporation | Compact microelectronic assembly having reduced spacing between controller and memory packages |
US9355963B2 (en) | 2014-09-26 | 2016-05-31 | Qualcomm Incorporated | Semiconductor package interconnections and method of making the same |
US9484080B1 (en) | 2015-11-09 | 2016-11-01 | Invensas Corporation | High-bandwidth memory application with controlled impedance loading |
US9679613B1 (en) | 2016-05-06 | 2017-06-13 | Invensas Corporation | TFD I/O partition for high-speed, high-density applications |
JP6963448B2 (ja) * | 2017-09-13 | 2021-11-10 | 太陽誘電株式会社 | 電子部品 |
US11508663B2 (en) | 2018-02-02 | 2022-11-22 | Marvell Israel (M.I.S.L) Ltd. | PCB module on package |
CN114144875A (zh) | 2019-06-10 | 2022-03-04 | 马维尔以色列(M.I.S.L.)有限公司 | 具有顶侧存储器模块的ic封装 |
CN111696983B (zh) * | 2020-06-24 | 2024-03-15 | 悦虎晶芯电路(苏州)股份有限公司 | 多芯片水平封装的芯片模组、晶圆结构和加工方法 |
US20230207523A1 (en) * | 2021-12-28 | 2023-06-29 | International Business Machines Corporation | Wafer to wafer high density interconnects |
Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5399898A (en) * | 1992-07-17 | 1995-03-21 | Lsi Logic Corporation | Multi-chip semiconductor arrangements using flip chip dies |
JP2003174113A (ja) * | 2001-12-07 | 2003-06-20 | Sony Corp | 半導体装置およびその製造方法ならびに電子回路装置 |
JP2007180529A (ja) * | 2005-12-02 | 2007-07-12 | Nec Electronics Corp | 半導体装置およびその製造方法 |
JP2007317822A (ja) * | 2006-05-25 | 2007-12-06 | Sony Corp | 基板処理方法及び半導体装置の製造方法 |
JP2011527113A (ja) * | 2008-06-30 | 2011-10-20 | クゥアルコム・インコーポレイテッド | シリコン貫通ビアのブリッジする相互接続 |
Family Cites Families (81)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4796165A (en) * | 1988-03-18 | 1989-01-03 | Chrysler Motors Corporation | Vehicle tail light construction |
US5065347A (en) * | 1988-08-11 | 1991-11-12 | Xerox Corporation | Hierarchical folders display |
US5295243A (en) * | 1989-12-29 | 1994-03-15 | Xerox Corporation | Display of hierarchical three-dimensional structures with rotating substructures |
US5226117A (en) * | 1990-05-15 | 1993-07-06 | International Business Machines Corporation | Method for simultaneous update and change in parent and child windows |
US5511186A (en) * | 1992-11-18 | 1996-04-23 | Mdl Information Systems, Inc. | System and methods for performing multi-source searches over heterogeneous databases |
JP3318786B2 (ja) | 1993-03-29 | 2002-08-26 | ソニー株式会社 | マルチチップモジュールの構造 |
US5544352A (en) * | 1993-06-14 | 1996-08-06 | Libertech, Inc. | Method and apparatus for indexing, searching and displaying data |
JP3235452B2 (ja) | 1995-03-20 | 2001-12-04 | 松下電器産業株式会社 | 高周波集積回路装置 |
US5798760A (en) * | 1995-06-07 | 1998-08-25 | Vayda; Mark | Radial graphical menuing system with concentric region menuing |
US5894311A (en) * | 1995-08-08 | 1999-04-13 | Jerry Jackson Associates Ltd. | Computer-based visual data evaluation |
WO1997019415A2 (en) * | 1995-11-07 | 1997-05-29 | Cadis, Inc. | Search engine for remote object oriented database management system |
US5793365A (en) * | 1996-01-02 | 1998-08-11 | Sun Microsystems, Inc. | System and method providing a computer user interface enabling access to distributed workgroup members |
US5930474A (en) * | 1996-01-31 | 1999-07-27 | Z Land Llc | Internet organizer for accessing geographically and topically based information |
US5796165A (en) | 1996-03-19 | 1998-08-18 | Matsushita Electronics Corporation | High-frequency integrated circuit device having a multilayer structure |
US5812134A (en) * | 1996-03-28 | 1998-09-22 | Critical Thought, Inc. | User interface navigational system & method for interactive representation of information contained within a database |
JPH09293824A (ja) | 1996-04-26 | 1997-11-11 | Shinko Electric Ind Co Ltd | マルチチップモジュール |
US5987469A (en) * | 1996-05-14 | 1999-11-16 | Micro Logic Corp. | Method and apparatus for graphically representing information stored in electronic media |
US6272556B1 (en) * | 1996-07-01 | 2001-08-07 | Sun Microsystems, Inc. | Object-oriented system, method and article of manufacture for migrating a client-server application (#5) |
US5897670A (en) * | 1996-07-12 | 1999-04-27 | Sun Microsystems, Inc. | Method and system for efficient organization of selectable elements on a graphical user interface |
US5911145A (en) * | 1996-07-29 | 1999-06-08 | Rae Technology, Inc. | Hierarchical structure editor for web sites |
US6025843A (en) * | 1996-09-06 | 2000-02-15 | Peter Sklar | Clustering user interface |
US6144962A (en) * | 1996-10-15 | 2000-11-07 | Mercury Interactive Corporation | Visualization of web sites and hierarchical data structures |
US5958008A (en) * | 1996-10-15 | 1999-09-28 | Mercury Interactive Corporation | Software system and associated methods for scanning and mapping dynamically-generated web documents |
AU5200198A (en) * | 1996-11-07 | 1998-05-29 | Natrificial Llc | Method and apparatus for organizing and processing information using a digital computer |
US6263507B1 (en) * | 1996-12-05 | 2001-07-17 | Interval Research Corporation | Browser for use in navigating a body of information, with particular application to browsing information represented by audiovisual data |
US5842218A (en) * | 1996-12-06 | 1998-11-24 | Media Plan, Inc. | Method, computer program product, and system for a reorienting categorization table |
US5966126A (en) * | 1996-12-23 | 1999-10-12 | Szabo; Andrew J. | Graphic user interface for database system |
US6070176A (en) * | 1997-01-30 | 2000-05-30 | Intel Corporation | Method and apparatus for graphically representing portions of the world wide web |
US6278464B1 (en) * | 1997-03-07 | 2001-08-21 | Silicon Graphics, Inc. | Method, system, and computer program product for visualizing a decision-tree classifier |
US5924090A (en) * | 1997-05-01 | 1999-07-13 | Northern Light Technology Llc | Method and apparatus for searching a database of records |
US6098066A (en) * | 1997-06-13 | 2000-08-01 | Sun Microsystems, Inc. | Method and apparatus for searching for documents stored within a document directory hierarchy |
US6278991B1 (en) * | 1997-08-22 | 2001-08-21 | Sap Aktiengesellschaft | Browser for hierarchical structures |
JPH1167963A (ja) | 1997-08-26 | 1999-03-09 | Matsushita Electric Works Ltd | 半導体装置 |
US6112181A (en) * | 1997-11-06 | 2000-08-29 | Intertrust Technologies Corporation | Systems and methods for matching, selecting, narrowcasting, and/or classifying based on rights management and/or other information |
US6085187A (en) * | 1997-11-24 | 2000-07-04 | International Business Machines Corporation | Method and apparatus for navigating multiple inheritance concept hierarchies |
US6014662A (en) * | 1997-11-26 | 2000-01-11 | International Business Machines Corporation | Configurable briefing presentations of search results on a graphical interface |
US6223145B1 (en) * | 1997-11-26 | 2001-04-24 | Zerox Corporation | Interactive interface for specifying searches |
JP2870533B1 (ja) | 1997-11-27 | 1999-03-17 | 日本電気株式会社 | 半導体装置およびその製造方法 |
US6055538A (en) * | 1997-12-22 | 2000-04-25 | Hewlett Packard Company | Methods and system for using web browser to search large collections of documents |
US6272650B1 (en) * | 1998-02-03 | 2001-08-07 | Amazing Media, Inc. | System and method for disambiguating scene graph loads |
US6028605A (en) * | 1998-02-03 | 2000-02-22 | Documentum, Inc. | Multi-dimensional analysis of objects by manipulating discovered semantic properties |
US6304259B1 (en) * | 1998-02-09 | 2001-10-16 | International Business Machines Corporation | Computer system, method and user interface components for abstracting and accessing a body of knowledge |
US6189045B1 (en) * | 1998-03-26 | 2001-02-13 | International Business Machines Corp. | Data type conversion for enhancement of network communication systems |
US6448987B1 (en) * | 1998-04-03 | 2002-09-10 | Intertainer, Inc. | Graphic user interface for a digital content delivery system using circular menus |
US6275820B1 (en) * | 1998-07-16 | 2001-08-14 | Perot Systems Corporation | System and method for integrating search results from heterogeneous information resources |
US6223094B1 (en) * | 1998-08-21 | 2001-04-24 | Sap Aktiengesellschaft | Multi-tiered structure for storing and displaying product and process variants |
US6166738A (en) * | 1998-09-14 | 2000-12-26 | Microsoft Corporation | Methods, apparatus and data structures for providing a user interface, which exploits spatial memory in three-dimensions, to objects |
US6054989A (en) * | 1998-09-14 | 2000-04-25 | Microsoft Corporation | Methods, apparatus and data structures for providing a user interface, which exploits spatial memory in three-dimensions, to objects and which provides spatialized audio |
US6278452B1 (en) * | 1998-09-18 | 2001-08-21 | Oracle Corporation | Concise dynamic user interface for comparing hierarchically structured collections of objects |
US6301579B1 (en) * | 1998-10-20 | 2001-10-09 | Silicon Graphics, Inc. | Method, system, and computer program product for visualizing a data structure |
US6304889B1 (en) * | 1998-11-18 | 2001-10-16 | International Business Machines Corporation | Exponential optimization |
US7840472B1 (en) * | 1999-12-08 | 2010-11-23 | Ebay Inc. | Method and apparatus for holding an online live auction to combine features of both the internet and traditional, real world auctions |
US6763496B1 (en) * | 1999-03-31 | 2004-07-13 | Microsoft Corporation | Method for promoting contextual information to display pages containing hyperlinks |
US6239803B1 (en) * | 1999-04-14 | 2001-05-29 | Stanley W. Driskell | Method to achieve least effort selection from an item list of arbitrary length |
US6601061B1 (en) * | 1999-06-18 | 2003-07-29 | Surfwax, Inc. | Scalable information search and retrieval including use of special purpose searching resources |
JP3823636B2 (ja) | 1999-09-22 | 2006-09-20 | カシオ計算機株式会社 | 半導体チップモジュール及びその製造方法 |
JP3289714B2 (ja) * | 1999-10-12 | 2002-06-10 | ヤマハ株式会社 | 電気凝固式印刷機 |
US20010054035A1 (en) * | 2000-04-01 | 2001-12-20 | Lee Soo Sung | System and method for searching target web site by employing internet portal site having icons arranged according to frequency number of use |
US7523114B2 (en) * | 2000-04-24 | 2009-04-21 | Ebay Inc. | Method and system for categorizing items in both actual and virtual categories |
US6769010B1 (en) * | 2000-05-11 | 2004-07-27 | Howzone.Com Inc. | Apparatus for distributing information over a network-based environment, method of distributing information to users, and method for associating content objects with a database wherein the content objects are accessible over a network communication medium by a user |
US6879332B2 (en) * | 2000-05-16 | 2005-04-12 | Groxis, Inc. | User interface for displaying and exploring hierarchical information |
US6980982B1 (en) * | 2000-08-29 | 2005-12-27 | Gcg, Llc | Search system and method involving user and provider associated beneficiary groups |
US7660740B2 (en) * | 2000-10-16 | 2010-02-09 | Ebay Inc. | Method and system for listing items globally and regionally, and customized listing according to currency or shipping area |
AU2002220172A1 (en) * | 2000-11-15 | 2002-05-27 | David M. Holbrook | Apparatus and method for organizing and/or presenting data |
US8036949B2 (en) * | 2000-11-15 | 2011-10-11 | Nick Nassiri | Real-time, interactive, competitive method of on-line auction utilizing an auctioneer |
US6507115B2 (en) * | 2000-12-14 | 2003-01-14 | International Business Machines Corporation | Multi-chip integrated circuit module |
US20020074637A1 (en) * | 2000-12-19 | 2002-06-20 | Intel Corporation | Stacked flip chip assemblies |
US8428996B2 (en) * | 2001-06-11 | 2013-04-23 | Ebay Inc. | Method and system automatically to support multiple transaction types, and to display seller-specific transactions of various transaction types in an integrated, commingled listing |
US7122904B2 (en) * | 2002-04-25 | 2006-10-17 | Macronix International Co., Ltd. | Semiconductor packaging device and manufacture thereof |
US20050125240A9 (en) * | 2002-10-21 | 2005-06-09 | Speiser Leonard R. | Product recommendation in a network-based commerce system |
US6856009B2 (en) * | 2003-03-11 | 2005-02-15 | Micron Technology, Inc. | Techniques for packaging multiple device components |
US20050150951A1 (en) * | 2003-06-26 | 2005-07-14 | Nathan Sacco | Method and apparatus for measuring and monitoring post-sales conditions within a network trading platform |
US7084487B1 (en) * | 2003-12-09 | 2006-08-01 | Xilinx, Inc. | Shielded platform for die-bonding an analog die to an FPGA |
US20060038272A1 (en) * | 2004-08-17 | 2006-02-23 | Texas Instruments Incorporated | Stacked wafer scale package |
KR100669830B1 (ko) * | 2004-11-16 | 2007-04-16 | 삼성전자주식회사 | 이방성 도전막을 이용한 적층 패키지 |
TWI264127B (en) * | 2005-09-23 | 2006-10-11 | Via Tech Inc | Chip package and substrate thereof |
JP4828202B2 (ja) * | 2005-10-20 | 2011-11-30 | ルネサスエレクトロニクス株式会社 | モジュール半導体装置 |
DE102006001767B4 (de) * | 2006-01-12 | 2009-04-30 | Infineon Technologies Ag | Halbleitermodul mit Halbleiterchips und Verfahren zur Herstellung desselben |
JP4828251B2 (ja) * | 2006-02-22 | 2011-11-30 | エルピーダメモリ株式会社 | 積層型半導体記憶装置及びその制御方法 |
US7911044B2 (en) * | 2006-12-29 | 2011-03-22 | Advanced Chip Engineering Technology Inc. | RF module package for releasing stress |
JP2010010644A (ja) * | 2008-05-27 | 2010-01-14 | Toshiba Corp | 半導体装置の製造方法 |
-
2009
- 2009-08-20 JP JP2009191280A patent/JP5635247B2/ja active Active
-
2010
- 2010-07-28 DE DE102010036678A patent/DE102010036678A1/de not_active Withdrawn
- 2010-08-17 US US12/857,893 patent/US8368230B2/en active Active
Patent Citations (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5399898A (en) * | 1992-07-17 | 1995-03-21 | Lsi Logic Corporation | Multi-chip semiconductor arrangements using flip chip dies |
JP2003174113A (ja) * | 2001-12-07 | 2003-06-20 | Sony Corp | 半導体装置およびその製造方法ならびに電子回路装置 |
JP2007180529A (ja) * | 2005-12-02 | 2007-07-12 | Nec Electronics Corp | 半導体装置およびその製造方法 |
JP2007317822A (ja) * | 2006-05-25 | 2007-12-06 | Sony Corp | 基板処理方法及び半導体装置の製造方法 |
JP2011527113A (ja) * | 2008-06-30 | 2011-10-20 | クゥアルコム・インコーポレイテッド | シリコン貫通ビアのブリッジする相互接続 |
Cited By (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
KR101436980B1 (ko) * | 2011-12-28 | 2014-09-02 | 브로드콤 코포레이션 | 브릿지 인터포저를 갖는 반도체 패키지 |
US9059179B2 (en) | 2011-12-28 | 2015-06-16 | Broadcom Corporation | Semiconductor package with a bridge interposer |
US9431371B2 (en) | 2011-12-28 | 2016-08-30 | Broadcom Corporation | Semiconductor package with a bridge interposer |
Also Published As
Publication number | Publication date |
---|---|
US20110042824A1 (en) | 2011-02-24 |
DE102010036678A1 (de) | 2011-02-24 |
JP5635247B2 (ja) | 2014-12-03 |
US8368230B2 (en) | 2013-02-05 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP5635247B2 (ja) | マルチチップモジュール | |
JP5532744B2 (ja) | マルチチップモジュール及びマルチチップモジュールの製造方法 | |
TWI517322B (zh) | 半導體元件及其製作方法 | |
US7989959B1 (en) | Method of forming stacked-die integrated circuit | |
US8334174B2 (en) | Chip scale package and fabrication method thereof | |
TWI694612B (zh) | 半導體模組 | |
TW202038348A (zh) | 天線整合式封裝結構及其製造方法 | |
JP5729290B2 (ja) | 半導体装置の製造方法、電子装置の製造方法及び基板 | |
WO2010050087A1 (ja) | 積層型半導体装置及びその製造方法 | |
WO2011024939A1 (ja) | 半導体装置およびその製造方法 | |
KR20200037066A (ko) | 팬-아웃 패키지 및 그 형성 방법 | |
JP2012186393A (ja) | 電子装置、携帯型電子端末機、及び電子装置の製造方法 | |
JP2008210912A (ja) | 半導体装置及びその製造方法 | |
TW201946245A (zh) | 半導體封裝體及包含半導體封裝體之裝置 | |
TW201517224A (zh) | 半導體裝置以及其製備方法 | |
JP5509724B2 (ja) | マルチチップモジュールの製造方法 | |
JP5282005B2 (ja) | マルチチップモジュール | |
TWI733142B (zh) | 電子封裝件 | |
KR20160084344A (ko) | 반도체 장치 및 그 제조 방법 | |
TWI797701B (zh) | 半導體裝置及其製造方法 | |
TW202315013A (zh) | 半導體裝置及製造半導體裝置的方法 | |
JP2008288481A (ja) | 半導体装置およびその製造方法 | |
JP2005044989A (ja) | 半導体パッケージ及びその製造方法 | |
JP2014078760A (ja) | マルチチップモジュール | |
JP7192523B2 (ja) | 半導体パッケージ及び電子装置 |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20120405 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20130131 |
|
A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20130212 |
|
A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20130403 |
|
A02 | Decision of refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A02 Effective date: 20131203 |
|
A521 | Written amendment |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20140203 |
|
A911 | Transfer to examiner for re-examination before appeal (zenchi) |
Free format text: JAPANESE INTERMEDIATE CODE: A911 Effective date: 20140212 |
|
A912 | Re-examination (zenchi) completed and case transferred to appeal board |
Free format text: JAPANESE INTERMEDIATE CODE: A912 Effective date: 20140328 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20141016 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 5635247 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |