JP2011003263A5 - - Google Patents

Download PDF

Info

Publication number
JP2011003263A5
JP2011003263A5 JP2010140657A JP2010140657A JP2011003263A5 JP 2011003263 A5 JP2011003263 A5 JP 2011003263A5 JP 2010140657 A JP2010140657 A JP 2010140657A JP 2010140657 A JP2010140657 A JP 2010140657A JP 2011003263 A5 JP2011003263 A5 JP 2011003263A5
Authority
JP
Japan
Prior art keywords
bit data
group code
state group
volatile memory
controller
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2010140657A
Other languages
English (en)
Japanese (ja)
Other versions
JP2011003263A (ja
JP5632210B2 (ja
Filing date
Publication date
Priority claimed from KR1020090055397A external-priority patent/KR101572830B1/ko
Application filed filed Critical
Publication of JP2011003263A publication Critical patent/JP2011003263A/ja
Publication of JP2011003263A5 publication Critical patent/JP2011003263A5/ja
Application granted granted Critical
Publication of JP5632210B2 publication Critical patent/JP5632210B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

JP2010140657A 2009-06-22 2010-06-21 非揮発性メモリ装置及びそのプログラム方法 Active JP5632210B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR1020090055397A KR101572830B1 (ko) 2009-06-22 2009-06-22 비휘발성 메모리 장치의 프로그램 방법, 비휘발성 메모리 장치 및 비휘발성 메모리 시스템
KR10-2009-0055397 2009-06-22

Publications (3)

Publication Number Publication Date
JP2011003263A JP2011003263A (ja) 2011-01-06
JP2011003263A5 true JP2011003263A5 (enExample) 2013-07-25
JP5632210B2 JP5632210B2 (ja) 2014-11-26

Family

ID=43354226

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2010140657A Active JP5632210B2 (ja) 2009-06-22 2010-06-21 非揮発性メモリ装置及びそのプログラム方法

Country Status (3)

Country Link
US (2) US8391062B2 (enExample)
JP (1) JP5632210B2 (enExample)
KR (1) KR101572830B1 (enExample)

Families Citing this family (50)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101572830B1 (ko) * 2009-06-22 2015-11-30 삼성전자주식회사 비휘발성 메모리 장치의 프로그램 방법, 비휘발성 메모리 장치 및 비휘발성 메모리 시스템
US8467237B2 (en) 2010-10-15 2013-06-18 Micron Technology, Inc. Read distribution management for phase change memory
US8860117B2 (en) 2011-04-28 2014-10-14 Micron Technology, Inc. Semiconductor apparatus with multiple tiers of memory cells with peripheral transistors, and methods
US8874994B2 (en) 2011-07-22 2014-10-28 Sandisk Technologies Inc. Systems and methods of storing data
US9053809B2 (en) 2011-11-09 2015-06-09 Apple Inc. Data protection from write failures in nonvolatile memory
KR20130053247A (ko) * 2011-11-15 2013-05-23 삼성전자주식회사 불휘발성 메모리 장치에 데이터를 프로그램하는 프로그램 방법 및 불휘발성 메모리 장치를 포함하는 메모리 시스템
US8681569B2 (en) * 2012-02-22 2014-03-25 Silicon Motion, Inc. Method for reading data stored in a flash memory according to a threshold voltage distribution and memory controller and system thereof
US9001575B2 (en) 2012-03-30 2015-04-07 Micron Technology, Inc. Encoding program bits to decouple adjacent wordlines in a memory device
US9105314B2 (en) 2012-04-27 2015-08-11 Micron Technology, Inc. Program-disturb decoupling for adjacent wordlines of a memory device
KR101927212B1 (ko) 2012-05-09 2019-03-07 삼성전자주식회사 비휘발성 메모리 장치의 프로그래밍 방법
US8910000B2 (en) 2012-05-17 2014-12-09 Micron Technology, Inc. Program-disturb management for phase change memory
US8964474B2 (en) * 2012-06-15 2015-02-24 Micron Technology, Inc. Architecture for 3-D NAND memory
US20140198576A1 (en) * 2013-01-16 2014-07-17 Macronix International Co, Ltd. Programming technique for reducing program disturb in stacked memory structures
KR102009437B1 (ko) * 2013-01-18 2019-08-13 에스케이하이닉스 주식회사 반도체 장치 및 이의 동작 방법
US9301723B2 (en) 2013-03-15 2016-04-05 Covidien Lp Microwave energy-delivery device and system
KR102101304B1 (ko) 2013-03-15 2020-04-16 삼성전자주식회사 메모리 컨트롤러 및 메모리 컨트롤러의 동작 방법
US9183940B2 (en) 2013-05-21 2015-11-10 Aplus Flash Technology, Inc. Low disturbance, power-consumption, and latency in NAND read and program-verify operations
JP6179206B2 (ja) * 2013-06-11 2017-08-16 株式会社リコー メモリ制御装置
US9263137B2 (en) 2013-06-27 2016-02-16 Aplus Flash Technology, Inc. NAND array architecture for multiple simutaneous program and read
WO2015013689A2 (en) 2013-07-25 2015-01-29 Aplus Flash Technology, Inc. Nand array hiarchical bl structures for multiple-wl and all -bl simultaneous erase, erase-verify, program, program-verify, and read operations
US9293205B2 (en) 2013-09-14 2016-03-22 Aplus Flash Technology, Inc Multi-task concurrent/pipeline NAND operations on all planes
WO2015100434A2 (en) 2013-12-25 2015-07-02 Aplus Flash Technology, Inc A HYBRID NAND WITH ALL-BL m-PAGE OPERATION SCHEME
WO2016014731A1 (en) 2014-07-22 2016-01-28 Aplus Flash Technology, Inc. Yukai vsl-based vt-compensation for nand memory
TWI559312B (zh) * 2015-05-20 2016-11-21 旺宏電子股份有限公司 記憶體裝置與其程式化方法
CN106558343B (zh) * 2015-09-24 2021-12-28 三星电子株式会社 操作非易失性存储装置的方法和非易失性存储装置
KR102498248B1 (ko) * 2016-02-04 2023-02-10 에스케이하이닉스 주식회사 반도체 메모리 장치 및 그것의 동작 방법
US9679650B1 (en) 2016-05-06 2017-06-13 Micron Technology, Inc. 3D NAND memory Z-decoder
US9798481B1 (en) * 2016-06-15 2017-10-24 Winbond Electronics Corp. Memory system includes a memory controller coupled to a non-volatile memory array configured to provide special write operation to write data in the non-volatile memory array before a board mount operation is applied and provde a regular write operation after a board mount operation is applied
JP6652470B2 (ja) 2016-09-07 2020-02-26 キオクシア株式会社 半導体記憶装置
KR102533197B1 (ko) 2016-09-22 2023-05-17 에스케이하이닉스 주식회사 반도체 메모리 장치 및 그 동작 방법
US10381094B2 (en) 2016-10-11 2019-08-13 Macronix International Co., Ltd. 3D memory with staged-level multibit programming
US10354723B2 (en) 2017-06-29 2019-07-16 SK Hynix Inc. Memory device and method for programming the same
US10748605B2 (en) * 2018-08-08 2020-08-18 Macronix International Co., Ltd. Memory device and programming method of multi-level cell (MLC)
US12142329B2 (en) 2018-11-18 2024-11-12 NEO Semiconductor, Inc. Methods and apparatus for NAND flash memory
US12165717B2 (en) 2018-11-18 2024-12-10 NEO Semiconductor, Inc. Methods and apparatus for a novel memory array
US12002525B2 (en) 2018-11-18 2024-06-04 NEO Semiconductor, Inc. Methods and apparatus for NAND flash memory
US11049579B2 (en) 2018-11-18 2021-06-29 Fu-Chang Hsu Methods and apparatus for NAND flash memory
US12217808B2 (en) 2018-11-18 2025-02-04 NEO Semiconductor, Inc. Methods and apparatus for NAND flash memory
US11972811B2 (en) 2018-11-18 2024-04-30 NEO Semiconductor, Inc. Methods and apparatus for NAND flash memory
KR102694842B1 (ko) * 2018-12-12 2024-08-14 삼성전자주식회사 비휘발성 메모리 장치의 동작 방법, 스토리지 장치의 동작 방법 및 스토리지 장치
US10811109B2 (en) * 2018-12-27 2020-10-20 Sandisk Technologies Llc Multi-pass programming process for memory device which omits verify test in first program pass
US11061762B2 (en) * 2019-02-04 2021-07-13 Intel Corporation Memory programming techniques
US11450381B2 (en) 2019-08-21 2022-09-20 Micron Technology, Inc. Multi-deck memory device including buffer circuitry under array
US11309032B2 (en) * 2019-11-26 2022-04-19 Samsung Electronics Co., Ltd. Operating method of memory system including memory controller and nonvolatile memory device
CN112002365B (zh) * 2020-08-21 2022-12-23 中国科学技术大学 基于多比特非易失存储器的并行逻辑运算方法及全加器
KR20220041574A (ko) 2020-09-25 2022-04-01 에스케이하이닉스 주식회사 반도체 메모리 장치 및 그 동작 방법
US11462279B1 (en) * 2021-05-13 2022-10-04 Western Digital Technologies, Inc. Modified distribution of memory device states
EP4392975A4 (en) * 2021-08-26 2025-07-23 Neo Semiconductor Inc METHODS AND APPARATUS FOR NAND FLASH MEMORY
JP2023116846A (ja) * 2022-02-10 2023-08-23 キオクシア株式会社 半導体記憶装置及び方法
KR20240048893A (ko) * 2022-10-07 2024-04-16 삼성전자주식회사 스토리지 장치 및 그것의 프로그램 방법

Family Cites Families (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4050555B2 (ja) * 2002-05-29 2008-02-20 株式会社東芝 不揮発性半導体記憶装置およびそのデータ書き込み方法
JP2004103089A (ja) 2002-09-06 2004-04-02 Sharp Corp 不揮発性半導体記憶装置およびその再書き込み方法
JP3935139B2 (ja) 2002-11-29 2007-06-20 株式会社東芝 半導体記憶装置
US7206224B1 (en) * 2004-04-16 2007-04-17 Spansion Llc Methods and systems for high write performance in multi-bit flash memory devices
JP4410188B2 (ja) 2004-11-12 2010-02-03 株式会社東芝 半導体記憶装置のデータ書き込み方法
JP4157563B2 (ja) 2006-01-31 2008-10-01 株式会社東芝 半導体集積回路装置
KR100766241B1 (ko) 2006-05-10 2007-10-10 주식회사 하이닉스반도체 플래쉬 메모리 소자의 프로그램 방법
US7991960B2 (en) * 2006-10-11 2011-08-02 Arm Limited Adaptive comparison control in a data store
KR100836762B1 (ko) 2006-12-11 2008-06-10 삼성전자주식회사 멀티 비트 플래시 메모리 장치 및 그것의 프로그램 방법
KR101490421B1 (ko) * 2008-07-11 2015-02-06 삼성전자주식회사 메모리 셀 사이의 간섭을 억제할 수 있는 불휘발성 메모리장치, 컴퓨팅 시스템 및 그것의 프로그램 방법
US8482976B2 (en) * 2008-12-09 2013-07-09 Kabushiki Kaisha Toshiba Semiconductor memory device and semiconductor memory system storing multilevel data
KR101563647B1 (ko) * 2009-02-24 2015-10-28 삼성전자주식회사 메모리 시스템 및 그것의 데이터 처리 방법
KR101572830B1 (ko) * 2009-06-22 2015-11-30 삼성전자주식회사 비휘발성 메모리 장치의 프로그램 방법, 비휘발성 메모리 장치 및 비휘발성 메모리 시스템
KR20110055178A (ko) * 2009-11-19 2011-05-25 삼성전자주식회사 플래시 메모리 장치 및 그것을 포함한 메모리 시스템
KR20130057086A (ko) * 2011-11-23 2013-05-31 삼성전자주식회사 비휘발성 메모리 장치의 프로그램 방법
KR20130060795A (ko) * 2011-11-30 2013-06-10 삼성전자주식회사 불휘발성 메모리 장치 및 그것의 동작 방법
KR20130080203A (ko) * 2012-01-04 2013-07-12 삼성전자주식회사 셀 상태들의 비대칭 특성을 고려한 프로그램 데이터를 생성하는 방법 및 그것을 이용한 메모리 시스템

Similar Documents

Publication Publication Date Title
JP2011003263A5 (enExample)
US8014201B2 (en) Nonvolatile memory device extracting parameters and nonvolatile memory system including the same
JP6298249B2 (ja) 不揮発性メモリ装置とそれを含むメモリシステム及びそれらのメモリブロック管理、消去、及びプログラム方法
US8971110B2 (en) Nonvolatile memory device and programming method of the same
US7684238B2 (en) Methods of programming multi-bit flash memory devices and related devices
KR100878479B1 (ko) 데이터 정보에 따라 프로그램 방식을 결정하는 메모리시스템
KR100823174B1 (ko) 멀티-페이지 프로그램 스킴을 갖는 플래시 메모리 장치 및그것의 멀티-페이지 프로그램 방법
US7505338B2 (en) Memory systems and memory cards that use a bad block due to a programming failure therein in single level cell mode and methods of operating the same
JP2007533055A5 (enExample)
US20140211565A1 (en) Methods of programming multi-level cell nonvolatile memory devices and devices so operating
JP2015156251A (ja) ダイナミックマルチモード動作を有する不揮発性メモリ
US8861278B2 (en) Non-volatile memory device and cache program method of the same
US20080192539A1 (en) Memory System Including MLC Flash Memory
US20140215133A1 (en) Memory system and related block management method
JP2011003263A (ja) 非揮発性メモリ装置及びそのプログラム方法
US20090225593A1 (en) Method of operating a flash memory device
US8549214B2 (en) Protection against data corruption for multi-level memory cell (MLC) flash memory
US20140115234A1 (en) Memory system comprising nonvolatile memory device and related method of operation
KR20110124632A (ko) 비휘발성 메모리 장치, 이의 리드 동작 방법 및 이를 포함하는 장치들
US9117538B2 (en) Semiconductor device, method for operating the same, and semiconductor system including the same
US20120195118A1 (en) Semiconductor memory apparatus, data programming method thereof, and memory system including the same
US12327595B2 (en) Shortened single-level cell memory programming
US20150357040A1 (en) Nonvolatile memory and data writing method
KR20120138895A (ko) 멀티-레벨 메모리 장치를 포함한 데이터 저장 시스템 및 그것의 동작 방법
KR20100088898A (ko) 플래시 메모리 장치, 및 이의 프로그램 및 독출 방법