JP2010534896A5 - - Google Patents

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Publication number
JP2010534896A5
JP2010534896A5 JP2010517037A JP2010517037A JP2010534896A5 JP 2010534896 A5 JP2010534896 A5 JP 2010534896A5 JP 2010517037 A JP2010517037 A JP 2010517037A JP 2010517037 A JP2010517037 A JP 2010517037A JP 2010534896 A5 JP2010534896 A5 JP 2010534896A5
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Japan
Prior art keywords
test
memory
voltage level
operating
testing
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JP2010517037A
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Japanese (ja)
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JP5462160B2 (ja
JP2010534896A (ja
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Priority claimed from US11/777,635 external-priority patent/US7616509B2/en
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JP2010517037A 2007-07-13 2008-05-28 メモリの動的電圧調整 Active JP5462160B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US11/777,635 US7616509B2 (en) 2007-07-13 2007-07-13 Dynamic voltage adjustment for memory
US11/777,635 2007-07-13
PCT/US2008/064969 WO2009011977A1 (en) 2007-07-13 2008-05-28 Dynamic voltage adjustment for memory

Publications (3)

Publication Number Publication Date
JP2010534896A JP2010534896A (ja) 2010-11-11
JP2010534896A5 true JP2010534896A5 (https=) 2011-07-14
JP5462160B2 JP5462160B2 (ja) 2014-04-02

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JP2010517037A Active JP5462160B2 (ja) 2007-07-13 2008-05-28 メモリの動的電圧調整

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US (1) US7616509B2 (https=)
JP (1) JP5462160B2 (https=)
KR (1) KR101498514B1 (https=)
CN (1) CN101743598B (https=)
TW (1) TWI490873B (https=)
WO (1) WO2009011977A1 (https=)

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