JP2010514178A - 薄型基板上の画像センサのための接続パッド構造 - Google Patents
薄型基板上の画像センサのための接続パッド構造 Download PDFInfo
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- 239000000758 substrate Substances 0.000 title claims abstract description 83
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims abstract description 41
- 239000004065 semiconductor Substances 0.000 claims abstract description 38
- 238000000034 method Methods 0.000 claims abstract description 32
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 claims abstract description 25
- 229910052782 aluminium Inorganic materials 0.000 claims abstract description 24
- 238000012546 transfer Methods 0.000 claims abstract description 13
- 229910052751 metal Inorganic materials 0.000 claims description 50
- 239000002184 metal Substances 0.000 claims description 50
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 35
- 229910052710 silicon Inorganic materials 0.000 claims description 35
- 239000010703 silicon Substances 0.000 claims description 35
- 238000005530 etching Methods 0.000 claims description 23
- 238000000151 deposition Methods 0.000 claims description 14
- 230000008569 process Effects 0.000 claims description 10
- 238000005520 cutting process Methods 0.000 claims description 3
- 239000004020 conductor Substances 0.000 claims description 2
- 230000002093 peripheral effect Effects 0.000 claims 1
- 238000004519 manufacturing process Methods 0.000 abstract description 15
- 238000012545 processing Methods 0.000 description 11
- 235000012431 wafers Nutrition 0.000 description 10
- 230000008021 deposition Effects 0.000 description 6
- 239000012212 insulator Substances 0.000 description 4
- 229920005591 polysilicon Polymers 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000009792 diffusion process Methods 0.000 description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 3
- 229910021421 monocrystalline silicon Inorganic materials 0.000 description 3
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 3
- 239000010937 tungsten Substances 0.000 description 3
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 2
- 238000013459 approach Methods 0.000 description 2
- 230000008901 benefit Effects 0.000 description 2
- 230000008859 change Effects 0.000 description 2
- 238000005260 corrosion Methods 0.000 description 2
- 230000007797 corrosion Effects 0.000 description 2
- 239000010931 gold Substances 0.000 description 2
- 229910052737 gold Inorganic materials 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229910052814 silicon oxide Inorganic materials 0.000 description 2
- 238000011282 treatment Methods 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- 229910001069 Ti alloy Inorganic materials 0.000 description 1
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 1
- 229910001080 W alloy Inorganic materials 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 239000003086 colorant Substances 0.000 description 1
- 239000013078 crystal Substances 0.000 description 1
- 238000010292 electrical insulation Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 238000012994 industrial processing Methods 0.000 description 1
- 239000011810 insulating material Substances 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 230000010070 molecular adhesion Effects 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 238000012805 post-processing Methods 0.000 description 1
- 238000007781 pre-processing Methods 0.000 description 1
- 230000004044 response Effects 0.000 description 1
- 238000010561 standard procedure Methods 0.000 description 1
- MAKDTFFYCIMFQP-UHFFFAOYSA-N titanium tungsten Chemical compound [Ti].[W] MAKDTFFYCIMFQP-UHFFFAOYSA-N 0.000 description 1
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Abstract
【選択図】 図6
Description
−非薄型基板上に、専らパッドを接続するための多結晶シリコン層の一部分が設けられた集積回路を形成するステップであって、この部分は集積回路の内部接続に接触するステップと;
−回路を搬送基板上に搬送し、次いで回路の背面を薄層化するステップと;
−薄層化された背面にバイアを開口することにより、多結晶シリコンへのアクセスを得るステップと;
−背面上およびバイア内に金属層を堆積させ、この層をエッチングすることにより、多結晶シリコンを経由して集積回路の内部接続に接触するパッドを画定するステップと;を含む。
−表面半導体層を擁する第1の基板の前面から集積回路を形成するステップであって、この形成ステップが、まず、半導体層の前面上に多結晶シリコン層の部分で覆われた絶縁層を形成するステップと、次いで、絶縁層と金属層との交互体を堆積およびエッチングするステップとを含み、各金属層の間および多結晶シリコン層と金属層の少なくとも1つとの間にはインターコネクトが設けられるステップと;
−基板を、基板の前面を介して搬送基板上に搬送し、搬送基板に接合するステップと;
−第1の基板を、第1の基板の背面を介して薄層化することにより、厚さ約2〜30ミクロンの半導体層のみを保持するステップと;
−半導体層の背面を介して、多結晶シリコンで覆われた絶縁層エリアの上部に半導体層の全厚さの分だけアパーチャを切り込むステップと;
−アパーチャの底部から絶縁層を除去することによりシリコンを露出させてから、多結晶シリコンに接触することになる金属層を、アパーチャ内に堆積およびエッチングするステップと;を含んでもよい。
−シリコン表面12上に薄い絶縁層14(好ましくは酸化ケイ素)の各部分を形成するステップであって、これらは、MOSトランジスタのゲート、または電荷結合画像センサ(CCDセンサ)の場合はその上方に電荷移動ゲートの下方に位置することになる;
−堆積またはシリコンの熱酸化のいずれかにより、他の場所により厚い絶縁層16の各部分を形成するステップ;
−多結晶シリコン層18の堆積およびエッチングにより、トランジスタゲートまたは電荷移動ゲートを形成するステップ;
−集積回路内部でのインターコネクトの画定を可能にする絶縁層および導電層の交互スタックを堆積させるステップ。様々な手法を使用することができる。図1は、いくつかの導電層(好ましくはアルミニウム系の層)がM1〜M4で示すいくつかのレベルに配置され、別の導電金属(タングステンまたはチタン−タングステン)から形成されたバイアにより接続され、これらのバイアが絶縁層を通過している例を示す。この交互スタックの最後の絶縁層が、インターコネクト上部の最終平坦化層である。
1.標準的な前工程技術では、第1レベルのアルミニウム層が薄すぎるリスクがある。これは、(前面を介してパッドにアクセス可能である非薄型化技術において接続パッドの形成に供される)最後のレベルM4の金属が、一般にはより厚いためである。
2.第1レベルM1の金属を厚くすることも可能であるが、この場合、薄型基板上に回路を形成するたびに標準技術の変更が必要である。
3.より深い切り込みを設けて最後の(より厚い)金属レベルM4に達することにより、接続ワイヤを金属レベルM4に接合することも可能であるが、パッドがさらに深くなるためワイヤの接合がより困難になる。
4.シリコン12および絶縁体20内に切り込まれたカップ内にパッドが沈み込んでいるため、実際、ワイヤを接続パッド上に斜めにではなく垂直に導入する技術を用いて、アルミニウムワイヤではなく金ワイヤを溶接する必要がある。カップを非常に幅広いものにすることには問題があるが、そうしない限り、ワイヤを斜めに導入することはカップにより妨げられる。
5.金属M1が剥き出しである(ワイヤ接合後も剥き出しのままである)ため、この金属が将来腐食する原因となり得る。
Claims (8)
- 薄型基板を有する電子部品のための接続パッドを形成するための方法であって:
−非薄型基板上に、専ら前記パッドを接続するための多結晶シリコン層(18)の一部分が設けられた集積回路を形成するステップであって、この部分は前記集積回路の内部接続(M1)に接触するステップと;
−前記回路を搬送基板(30)上に搬送し、次いで前記回路の背面を薄層化するステップと;
−前記薄層化された背面(12)にバイア(50)を開口することにより、前記多結晶シリコンへのアクセスを得るステップと;
−前記背面上および前記バイア内に金属層(80)を堆積させ、この層をエッチングすることにより、前記多結晶シリコン(18)を経由して前記集積回路の前記内部接続(M1)に接触するパッドを画定するステップと;を含む、方法。 - 前記パッドを形成する処理が:
−表面半導体層(12)を擁する第1の基板(10)の前面から前記集積回路を形成するステップであって、この形成ステップが、まず、前記半導体層の前面上に多結晶シリコン層(18)の前記部分で覆われた絶縁層(14、16)を形成するステップと、次いで、絶縁層と金属層との交互体を堆積およびエッチングするステップとを含み、前記各金属層の間および前記多結晶シリコン層と前記金属層の少なくとも1つとの間にはインターコネクトが設けられるステップと;
−前記基板を、前記基板の前面を介して前記搬送基板(30)上に搬送し、前記搬送基板(30)に接合するステップと;
−前記第1の基板(10)を、前記第1の基板(10)の背面を介して薄層化することにより、厚さ約2〜30ミクロンの半導体層(12)のみを保持するステップと;
−前記半導体層の背面を介して、多結晶シリコンで覆われた絶縁層エリアの上部に前記半導体層の全厚さの分だけアパーチャ(50)を切り込むステップと;
−前記アパーチャの底部から前記絶縁層を除去することにより前記シリコンを露出させてから、前記多結晶シリコンに接触することになる前記金属層を、前記アパーチャ内に堆積およびエッチングするステップと;を含む、請求項1に記載の方法。 - 前記半導体層のエッチング処理中、後に画定される前記接続パッドと前記半導体層内に形成された前記アパーチャとの両方を完全に取り囲む周辺トレンチがエッチングされることを特徴とする、請求項2に記載の方法。
- 前記背面上に堆積される前記金属がアルミニウム系金属であることを特徴とする、請求項2または3に記載の方法。
- 前記搬送基板は、その前面に、前記薄型基板上に形成された前記集積回路に接続される第2の集積回路が集積された基板である方法であって、前記半導体層(12)をエッチングするステップ中、追加のアパーチャが形成され、このアパーチャの下方に位置する前記絶縁層は、その後、前記第2の集積回路の前面に至るまでエッチングされ、このエッチングは前記第2の集積回路の導電体が露出されるまで継続され、その後、前記半導体層の前記背面上に金属層を堆積させるステップが行われ、この絶縁層のエッチングにより、前記薄型基板上の前記集積回路に接続される接続パッドと前記追加のアパーチャを通る前記第2の集積回路への導電リンクとの両方の境界が定められることを特徴とする、請求項2〜4のいずれか一項に記載の方法。
- 第1の薄型シリコン基板の前面上に形成された集積回路を備える電子部品であって、前記薄型基板は、厚さ約2〜30ミクロンの薄い半導体層(12)を備え、前記第1の基板は、前記第1の基板の前面を介して搬送基板(30)上に搭載される部品において、前記部品は、前記半導体層(12)のアクセス可能な背面上に、前記半導体層上に堆積された金属層(80)の一部分により形成された少なくとも1つの外部接続パッド(PL1)を含み、前記金属層(80)は、アイランド内に形成されたアパーチャを通じて、前記第1の薄型基板の前記前面上に形成された多結晶シリコン層(18)に直接接触し、前記多結晶シリコン層(18)は、それ自体、前記薄型シリコン基板の前記前面上に形成された金属層(M1)に接触していることを特徴とする、部品。
- 前記半導体層内に形成された前記アパーチャは、アイランドを取り囲むトレンチにより残りの前記半導体層から完全に電気的に絶縁された半導体層アイランド内に形成されていることを特徴とする、請求項6に記載の部品。
- 前記搬送基板が集積回路チップであり、前記2つの集積回路の前面が互いに接合され、前記半導体層の前記背面上に形成された前記金属層(80)の前記部分が、前記接続パッド以外に、前記半導体層内に形成された別のアパーチャと第2の集積回路の前記前面上の導電層から前記半導体層を分離する絶縁層とを通じて、前記第2の集積回路の前記導電層に前記パッドを接続する導電リンクを備えることを特徴とする、請求項6または7に記載の電子部品。
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FR0611083A FR2910705B1 (fr) | 2006-12-20 | 2006-12-20 | Structure de plots de connexion pour capteur d'image sur substrat aminci |
FR0611083 | 2006-12-20 | ||
PCT/EP2007/063691 WO2008074691A1 (fr) | 2006-12-20 | 2007-12-11 | Structure de plots de connexion pour capteur d'image sur substrat aminci |
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JP2010514178A true JP2010514178A (ja) | 2010-04-30 |
JP5629906B2 JP5629906B2 (ja) | 2014-11-26 |
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US (1) | US8105917B2 (ja) |
EP (1) | EP2092564B1 (ja) |
JP (1) | JP5629906B2 (ja) |
AT (1) | ATE524830T1 (ja) |
FR (1) | FR2910705B1 (ja) |
WO (1) | WO2008074691A1 (ja) |
Cited By (1)
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JP2014165219A (ja) * | 2013-02-21 | 2014-09-08 | Renesas Electronics Corp | 半導体装置の製造方法 |
Families Citing this family (3)
Publication number | Priority date | Publication date | Assignee | Title |
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FR2910707B1 (fr) * | 2006-12-20 | 2009-06-12 | E2V Semiconductors Soc Par Act | Capteur d'image a haute densite d'integration |
FR2930840B1 (fr) * | 2008-04-30 | 2010-08-13 | St Microelectronics Crolles 2 | Procede de reprise de contact sur un circuit eclaire par la face arriere |
FR2948815B1 (fr) * | 2009-07-31 | 2012-02-03 | E2V Semiconductors | Structure de plots de connexion pour composant electronique |
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-
2006
- 2006-12-20 FR FR0611083A patent/FR2910705B1/fr not_active Expired - Fee Related
-
2007
- 2007-12-11 US US12/518,030 patent/US8105917B2/en not_active Expired - Fee Related
- 2007-12-11 JP JP2009541982A patent/JP5629906B2/ja not_active Expired - Fee Related
- 2007-12-11 EP EP07857381A patent/EP2092564B1/fr not_active Not-in-force
- 2007-12-11 AT AT07857381T patent/ATE524830T1/de not_active IP Right Cessation
- 2007-12-11 WO PCT/EP2007/063691 patent/WO2008074691A1/fr active Application Filing
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Also Published As
Publication number | Publication date |
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FR2910705A1 (fr) | 2008-06-27 |
US8105917B2 (en) | 2012-01-31 |
WO2008074691A1 (fr) | 2008-06-26 |
US20100314776A1 (en) | 2010-12-16 |
JP5629906B2 (ja) | 2014-11-26 |
FR2910705B1 (fr) | 2009-02-27 |
ATE524830T1 (de) | 2011-09-15 |
EP2092564B1 (fr) | 2011-09-14 |
EP2092564A1 (fr) | 2009-08-26 |
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