ATE524830T1 - Bolzenstruktur für einen bildsensor auf einem verdünnten substrat - Google Patents

Bolzenstruktur für einen bildsensor auf einem verdünnten substrat

Info

Publication number
ATE524830T1
ATE524830T1 AT07857381T AT07857381T ATE524830T1 AT E524830 T1 ATE524830 T1 AT E524830T1 AT 07857381 T AT07857381 T AT 07857381T AT 07857381 T AT07857381 T AT 07857381T AT E524830 T1 ATE524830 T1 AT E524830T1
Authority
AT
Austria
Prior art keywords
substrate
thinned
polycrystalline silicon
pad
image sensor
Prior art date
Application number
AT07857381T
Other languages
English (en)
Inventor
Pierre Blanchard
Original Assignee
E2V Semiconductors
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by E2V Semiconductors filed Critical E2V Semiconductors
Application granted granted Critical
Publication of ATE524830T1 publication Critical patent/ATE524830T1/de

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/14636—Interconnect structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14601—Structural or functional details thereof
    • H01L27/1464—Back illuminated imager structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144—Devices controlled by radiation
    • H01L27/146—Imager structures
    • H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/0212—Auxiliary members for bonding areas, e.g. spacers
    • H01L2224/02122—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body
    • H01L2224/02163—Auxiliary members for bonding areas, e.g. spacers being formed on the semiconductor or solid-state body on the bonding area
    • H01L2224/02165—Reinforcing structures
    • H01L2224/02166—Collar structures
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/05001—Internal layers
    • H01L2224/05075—Plural internal layers
    • H01L2224/0508—Plural internal layers being stacked
    • H01L2224/05085—Plural internal layers being stacked with additional elements, e.g. vias arrays, interposed between the stacked layers
    • H01L2224/05089—Disposition of the additional element
    • H01L2224/05093—Disposition of the additional element of a plurality of vias
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554—External layer
    • H01L2224/0555—Shape
    • H01L2224/05556—Shape in side view
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
    • H01L2224/45124—Aluminium (Al) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001—Core members of the connector
    • H01L2224/45099—Material
    • H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144—Gold (Au) as principal constituent
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/4847—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a wedge bond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/13—Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304—Transistor
    • H01L2924/1306—Field-effect transistor [FET]
    • H01L2924/13091—Metal-Oxide-Semiconductor Field-Effect Transistor [MOSFET]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Electromagnetism (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Solid State Image Pick-Up Elements (AREA)
AT07857381T 2006-12-20 2007-12-11 Bolzenstruktur für einen bildsensor auf einem verdünnten substrat ATE524830T1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR0611083A FR2910705B1 (fr) 2006-12-20 2006-12-20 Structure de plots de connexion pour capteur d'image sur substrat aminci
PCT/EP2007/063691 WO2008074691A1 (fr) 2006-12-20 2007-12-11 Structure de plots de connexion pour capteur d'image sur substrat aminci

Publications (1)

Publication Number Publication Date
ATE524830T1 true ATE524830T1 (de) 2011-09-15

Family

ID=38255880

Family Applications (1)

Application Number Title Priority Date Filing Date
AT07857381T ATE524830T1 (de) 2006-12-20 2007-12-11 Bolzenstruktur für einen bildsensor auf einem verdünnten substrat

Country Status (6)

Country Link
US (1) US8105917B2 (de)
EP (1) EP2092564B1 (de)
JP (1) JP5629906B2 (de)
AT (1) ATE524830T1 (de)
FR (1) FR2910705B1 (de)
WO (1) WO2008074691A1 (de)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2910707B1 (fr) * 2006-12-20 2009-06-12 E2V Semiconductors Soc Par Act Capteur d'image a haute densite d'integration
FR2930840B1 (fr) * 2008-04-30 2010-08-13 St Microelectronics Crolles 2 Procede de reprise de contact sur un circuit eclaire par la face arriere
FR2948815B1 (fr) * 2009-07-31 2012-02-03 E2V Semiconductors Structure de plots de connexion pour composant electronique
JP2014165219A (ja) * 2013-02-21 2014-09-08 Renesas Electronics Corp 半導体装置の製造方法

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60140850A (ja) * 1983-12-28 1985-07-25 Hitachi Ltd 積層集積型半導体回路装置の製法
JPH04307732A (ja) * 1991-04-04 1992-10-29 Kawasaki Steel Corp 半導体装置及びその製造方法
JP4137328B2 (ja) * 1999-12-28 2008-08-20 光正 小柳 ３次元半導体集積回路装置の製造方法
JP2001250913A (ja) * 1999-12-28 2001-09-14 Mitsumasa Koyanagi ３次元半導体集積回路装置及びその製造方法
JP2002033458A (ja) * 2000-07-19 2002-01-31 Nikon Corp 半導体装置及びその製造方法
JP2001308137A (ja) * 2000-04-26 2001-11-02 Matsushita Electric Works Ltd 半導体装置及びその製造方法
JP3511172B2 (ja) * 2001-03-30 2004-03-29 富士通カンタムデバイス株式会社 高周波半導体装置
FR2829292B1 (fr) * 2001-08-31 2004-09-10 Atmel Grenoble Sa Procede de fabrication de capteur d'image couleur avec substrat de support soude plot sur plot
FR2856844B1 (fr) * 2003-06-24 2006-02-17 Commissariat Energie Atomique Circuit integre sur puce de hautes performances
JP2005136214A (ja) * 2003-10-30 2005-05-26 Nec Corp 薄膜デバイス基板の製造方法
JP4046069B2 (ja) * 2003-11-17 2008-02-13 ソニー株式会社 固体撮像素子及び固体撮像素子の製造方法
JP4940533B2 (ja) * 2003-12-12 2012-05-30 ソニー株式会社 半導体集積回路装置の製造方法
FR2863773B1 (fr) * 2003-12-12 2006-05-19 Atmel Grenoble Sa Procede de fabrication de puces electroniques en silicium aminci
JP3897036B2 (ja) * 2004-07-27 2007-03-22 株式会社ザイキューブ 半導体集積回路装置およびその製造方法
FR2887076B1 (fr) * 2005-06-10 2007-08-31 Atmel Grenoble Soc Par Actions Capteur d'image a substrat semiconducteur aminci avec metallisation arriere
JP4979320B2 (ja) * 2006-09-28 2012-07-18 ルネサスエレクトロニクス株式会社 半導体ウェハおよびその製造方法、ならびに半導体装置の製造方法

Also Published As

Publication number Publication date
JP2010514178A (ja) 2010-04-30
US8105917B2 (en) 2012-01-31
FR2910705A1 (fr) 2008-06-27
WO2008074691A1 (fr) 2008-06-26
EP2092564B1 (de) 2011-09-14
FR2910705B1 (fr) 2009-02-27
EP2092564A1 (de) 2009-08-26
US20100314776A1 (en) 2010-12-16
JP5629906B2 (ja) 2014-11-26

Similar Documents

Publication Publication Date Title
TW200636892A (en) Semiconductor device and its method for manufacturing
TW200620638A (en) Solid-state imaging device and method of manufacturing the same
SG165243A1 (en) Semiconductor device and method of forming a thin wafer without a carrier
SG160403A1 (en) Semiconductor device
WO2007121010A3 (en) Transistor and method with dual layer passivation
WO2009023349A3 (en) Integrated nanotube and cmos devices for system-on-chip (soc) applications and method for forming the same
TW200744120A (en) Semiconductor structure, semiconductor wafer and method for fabricating the same
TW200515541A (en) Semiconductor storage device and semiconductor integrated circuit
TW200601410A (en) Semiconductor device and method for manufacturing same
EP1758438A3 (de) Herstellungsverfahren einer Leiterplatte
WO2008035270A3 (en) Method of manufacturing a vertical contact in a semiconductor substrate
TW200625535A (en) Method for manufacturing semiconductor device, and semiconductor device and electronic device
EP2009688A3 (de) Halbleiterbauelement und Verfahren für seine Herstellung
EP2325871A3 (de) Halbleiterbauelement und Verfahren zu dessen Herstellung
GB0817831D0 (en) Improved packaging technology
WO2010025218A3 (en) Composite semiconductor substrates for thin-film device layer transfer
TW200802799A (en) Semiconductor device
DE602006003316D1 (de) Herstellungsverfahren für halbleitergehäuse und mit diesem verfahren hergestellte gehäuse
TW200741896A (en) A semiconductor package assembly and methods of forming the same
EP2075840A3 (de) Schutzbeschichtung beim Waferschneiden und entsprechendes Verfahren
TW200603374A (en) Semiconductor device and method of manufacturing the same
SG151203A1 (en) Integrated circuit package system with warp-free chip
WO2012052257A3 (de) Optoelektronischer halbleiterchip und verfahren zu dessen herstellung
ATE524830T1 (de) Bolzenstruktur für einen bildsensor auf einem verdünnten substrat
WO2004059728A3 (en) Method of fabricating an integrated circuit and semiconductor chip

Legal Events

Date Code Title Description
RER Ceased as to paragraph 5 lit. 3 law introducing patent treaties