JP2010258289A - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
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- JP2010258289A JP2010258289A JP2009108046A JP2009108046A JP2010258289A JP 2010258289 A JP2010258289 A JP 2010258289A JP 2009108046 A JP2009108046 A JP 2009108046A JP 2009108046 A JP2009108046 A JP 2009108046A JP 2010258289 A JP2010258289 A JP 2010258289A
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Abstract
【解決手段】本発明の半導体装置の製造方法では、ユニット54Aに含まれるアイランド14の側辺を、連結部58A、58Bを経由して、他のユニット54Bに含まれるアイランド14またはリードフレーム52の外枠52と連結する。この様にすることで、アイランド14の上下両主面に半導体素子が実装されても、連結部58A、58Bによりアイランド14が補強されているので、半導体素子の重みによるアイランドの傾斜が抑制される。
【選択図】図1
Description
12A、12B 半導体素子
14 アイランド
16、16A、16B、16C、 接続板
20A、20B、20C、20D、20E、20F、20G、20H リード
22A、22B、22C 半田
23A、23B、23C 半田
24 接続部
26 接続部
28A、28B、28C 半田クリーム
30A、30B、30C 半田クリーム
32 接合材
34 電極
36 電極
38 封止樹脂
50 リードフレーム
52 外枠
54、54A、54B ユニット
56、56A、56B 連結帯
58、58A、58B、58C 連結部
Claims (4)
- リードを経由して支持部と連結されたアイランドを含むユニットが複数個設けられ、第1主面と第2主面とを備えたリードフレームを用意する工程と、
前記各ユニットに含まれる前記アイランドの第1主面に第1半導体素子を固着すると共に、前記アイランドの第2主面に第2半導体を固着する工程と、
前記ユニットを前記リードフレームの前記支持部から分離する工程と、を備え、
前記ユニットに含まれる前記アイランドは、連結部を経由して、隣接する他のユニットに含まれるアイランドまたは前記支持部と連結されることを特徴とする半導体装置の製造方法。 - 前記アイランドには、一方向に対向する第1側辺および第2側辺、他方向に対向する第3側辺および第4側辺が含まれ、
前記アイランドの前記第1側辺が前記リードを経由して前記支持部と連結され、
前記アイランドの前記第3側辺および前記第4側辺が、前記連結部を経由して、隣接する前記ユニットに含まれる前記アイランドまたは前記支持部と連結されることを特徴とする請求項1記載の半導体装置の製造方法。 - 前記第1半導体素子および前記第2半導体素子を固着する工程では、
前記アイランドの前記第1主面に第1半田クリームを介して前記第1半導体素子を固着し、前記アイランドの前記第2主面に第2半田クリームを介して前記第2半導体素子を固着し、
前記第1半田クリームおよび前記第2半田クリームを同時に溶融することにより、前記第1半導体素子および前記第2半導体素子の固着を同時に行うことを特徴とする請求項2記載の半導体装置の製造方法。 - 前記各ユニットには、前記アイランドの第2側辺に一端が接近するリードが含まれ、
前記第1半導体素子および前記第2半導体素子を固着する工程では、
前記第1半導体素子の電極と前記リードの第1主面とを第1接続板を経由して接続し、
前記第1半導体素子の電極と前記リードの第2主面とを第2接続板を経由して接続することを特徴とする請求項3記載の半導体装置の製造方法。
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Cited By (3)
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JP2012169477A (ja) * | 2011-02-15 | 2012-09-06 | Shindengen Electric Mfg Co Ltd | 半導体装置 |
US9136007B2 (en) | 2013-03-21 | 2015-09-15 | Kabushiki Kaisha Toshiba | Semiconductor memory device storing management data redundantly in different pages |
US11177196B2 (en) | 2018-11-16 | 2021-11-16 | Fuji Electric Co., Ltd. | Lead frame, semiconductor device, and method for manufacturing semiconductor device |
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JPH1140738A (ja) * | 1997-07-18 | 1999-02-12 | Sharp Corp | 半導体装置 |
JP2002373964A (ja) * | 2001-06-14 | 2002-12-26 | Nec Kansai Ltd | リードフレーム |
JP2004047955A (ja) * | 2002-05-22 | 2004-02-12 | Matsushita Electric Ind Co Ltd | 半導体装置 |
JP2005064076A (ja) * | 2003-08-20 | 2005-03-10 | Sanyo Electric Co Ltd | 回路装置 |
JP2006216940A (ja) * | 2005-01-07 | 2006-08-17 | Toshiba Corp | 半導体装置 |
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JPH1140738A (ja) * | 1997-07-18 | 1999-02-12 | Sharp Corp | 半導体装置 |
JP2002373964A (ja) * | 2001-06-14 | 2002-12-26 | Nec Kansai Ltd | リードフレーム |
JP2004047955A (ja) * | 2002-05-22 | 2004-02-12 | Matsushita Electric Ind Co Ltd | 半導体装置 |
JP2005064076A (ja) * | 2003-08-20 | 2005-03-10 | Sanyo Electric Co Ltd | 回路装置 |
JP2006216940A (ja) * | 2005-01-07 | 2006-08-17 | Toshiba Corp | 半導体装置 |
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Publication number | Priority date | Publication date | Assignee | Title |
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JP2012169477A (ja) * | 2011-02-15 | 2012-09-06 | Shindengen Electric Mfg Co Ltd | 半導体装置 |
US9136007B2 (en) | 2013-03-21 | 2015-09-15 | Kabushiki Kaisha Toshiba | Semiconductor memory device storing management data redundantly in different pages |
US9627077B2 (en) | 2013-03-21 | 2017-04-18 | Kabushiki Kaisha Toshiba | Semiconductor memory device storing management data redundantly in different pages |
US11177196B2 (en) | 2018-11-16 | 2021-11-16 | Fuji Electric Co., Ltd. | Lead frame, semiconductor device, and method for manufacturing semiconductor device |
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