TWI248184B - High frequency semiconductor device, method for fabricating the same and lead frame thereof - Google Patents

Abstract

A high frequency semiconductor device, a method for fabricating the same and a lead frame thereof are proposed, in which the lead frame having a die pad and a plurality of leads is provided, wherein a plurality of high frequency electrically connected portions electrically isolated with the die pad is formed to surround the die pad. A chip having a plurality of high frequency I/O pads and non-high frequency I/O pads is attached on the die pad. Then, a plurality of wires is provided to electrically connect the high frequency I/O pads and the high frequency electrically connected portions, and to electrically connect the non-high frequency I/O pads and the leads, respectively. Finally, an encapsulant is formed to encapsulate the chip, the wires, the high frequency electrically portions, and the leads so as to expose the bottom surfaces of the die pad and the high frequency electrically connected portions, thereby improving the transfer quality of high frequency signals.

Description

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a high frequency semiconductor package and a method of fabricating the same, and a lead frame thereof, and more particularly to a high frequency semiconductor package capable of high frequency input/output and Method and its lead frame [Prior Art] With the advancement of the electronics industry and the advent of the digital age, consumers are increasingly demanding functional requirements for electronic products. Therefore, how to break through the technology of semiconductor manufacturing and integrated circuit design to make functions More powerful high-frequency chips have become an important issue in today's research. The challenge for semiconductor packaging technology is the signal transmission design of such high-frequency chips to avoid the limitation of chip packaging. Due to the packaging technology, the transmission performance of high-frequency signals is greatly reduced. Especially for semiconductor packages with leadframes as wafer carriers, it is more likely to affect the performance of high-frequency products due to their lead frame design. Become a major bottleneck in leadframe packaging technology. A semiconductor package in which a lead frame is a wafer carrier, such as a quad flat package (QFP), a quad flat non-leaded (QFN), or a small package ( Semiconductor package such as SOP (Small Outline Package), which is produced in the same manner as shown in FIG. 3, in a lead frame having a wafer holder 6 1 (D ie β P ad ) and a plurality of lead pins 6 2 (L ead ) A semiconductor crystal, a sheet 63 is adhered to the 60, and a plurality of bonding wires 64 (Wire) are electrically connected to the bonding pads 65 (P ad ) on the surface of the wafer 63 and a plurality of corresponding guiding pins 6 2 thereof. The encapsulant 66 covers the wafer 63 and the bonding wire 64 to form a semiconductor package, and

]]]] product. ptd page 7 1248184 V. Description of the invention (2) It is also possible to design a surface of the wafer holder 61 to be exposed outside the encapsulant 66 to become a wafer holder (Exposed Pad). a package for accelerating the dissipation of heat from the wafer 63 by the wafer holder 61. However, the signal transmission path of such a package is transmitted to an external electronic device such as a printed circuit board via the chip 63, the bonding wire 64, and the lead pin 62, and the signal transmission path is obviously too long, and Since the wafers 63 and the printed circuit board are not on the same plane, the guide pins 6 2 are bound to form a bent design, and there is no design space for shortening the length. Therefore, for the high frequency products above 2G Hz. In fact, such conventional packaging methods are difficult to meet the transmission requirements of the 'f number' and become a major obstacle in the south frequency chip package. Therefore, the high-frequency chip package has to use a high-order packaging technology such as a ball grid array (BG A ) or a flip-chip ball grid array (FCBGA), and the substrate (S ubstrate ) used by these technologies is The line layout on the lower surface performs fast signal transmission to meet the low conduction path of the high frequency chip; however, the unit price of the substrate is much higher than that of the lead frame, and the precise circuit layout on the surface of the substrate is far from the lead frame. The above-mentioned wire bonding operation is easy, so if compared with the lead frame packaging method, the use of such a packaging technology will obviously greatly increase the overall packaging cost (the substrate unit price often accounts for more than one-half of the overall cost) and the process complexity, the original design / Manufacturing costs, that is, higher frequency wafers, constitute a major problem in mass production, and the cost in the overall supply chain is difficult to reduce. Λ Therefore, it has been developed to change the design of the lead frame to shorten the signal transmission path, in an attempt to solve the problem of this high frequency product, as shown in the case of U.S. Patent No. 6, 3 4 8, 7 2 6 Propose a view as shown in Figure 4

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Fill ·· ? 176]]矽品· ptd Page 8 1248184 V. Invention Description (3) The leadless lead frame 70 (Leadless Leadframe) shown includes a wafer holder 7; L, a majority of the ring is located in the a conductive pad 7.2 around the wafer holder 71, and a tie bar 73 (Tie Bar) for connecting the conductive pad, and the corner edge of the lead frame 70 is formed to connect the conductive pad 72 to the frame 724. The upper support strip 7 5 (S u ρ ρ 〇 rt B ar ), therefore, the lead frame 70 can be as shown in the semiconductor package 80 of FIG. 4B, and the high frequency wafer 8 1 is adhered. The wafer holder 7 is electrically connected to the corresponding conductive pad 7 2 by a bonding wire 8 2 , and the wafer 8 1 , the bonding wire 8 2 , and the partial lead frame 7 are covered with an encapsulant 8 3 . 0, and the bottom surface of each of the conductive pads 7 2 is exposed outside the encapsulant 8 3 , and then the strips 7 3 for connecting the conductive pads 7 2 are electrically separated from each other, and the conductive pads 7 can be separated by the conductive pads 7 The design of 2 enables the high-frequency signal to be transmitted to the external printed circuit board via the wafer 8 and the conductive pad 8 2, which greatly shortens the signal transmission path and solves the problem of the conventional lead frame. Long question. However, although the package structure can solve the problem of signal transmission, but other process problems are also derived, the lead frame 70 is connected to the frame 7 4 only by the support bar 75 of its four-corner position. The thickness of the lead frame 70 is very thin, so that the flatness of the lead frame 70 is easily affected, and the outer conductive pad 7 2 and the inner conductive pad 7 2 are not coplanar, which makes the operation of the wire (W ire Β ο nding) difficult to be precise. The connection quality between the outer conductive pad 7 2 and the bonding wire 8 2 is greatly reduced, resulting in a missing line c as shown in Fig. 5. Therefore, this design can shorten the signal transmission path. The disconnection between the conductive pad 7 2 and the bonding wire 8 2 makes it difficult to transmit high-frequency signals. Moreover, compared with the conventional lead frame, such a special lead frame 70 has complicated process and high cost. The problem, the formation of mass production restrictions, it is obviously difficult to match the high-end products

]]]]矽品.ptd Page 9 1248184 V. Description of invention (4) Requirements for manufacturing In summary, how to develop a still-frequency semiconductor package and its manufacturing method and its lead frame to shorten the south frequency signal It is a problem that needs to be solved urgently in such research and development fields, and it is indeed a problem that needs to be solved urgently in such research and development fields. [The present invention] The south frequency semiconductor package of the frequency transmission m path and its manufacturing method and its lead frame 〇 - the present invention is to provide a low-cost high-frequency semiconductor > assembly and its manufacturing method and its lead frame One is to provide a high-frequency semiconductor package that does not cause warpage of the lead frame and its system Another § of the present invention is to provide a south-frequency semiconductor package having a bonding wire connection quality, a method for fabricating the same, and a lead frame thereof. The present invention further provides a simple semiconductor semiconductor package and The manufacturing method and the lead frame of the present invention are the same as the other S. The south frequency semiconductor package provided by the present invention includes: a lead frame having a wafer holder and a plurality of guide legs; and most south frequency electrical connection portions are formed on The wafer holder is separated from the wafer by a wafer; a wafer having an active surface and an inactive surface is attached to the wafer holder 5 with its non-active surface and the surface is divided into "frequency" /Output and non-high frequency input 丨m output; Most wire 5 is used to electrically connect the non-Southern frequency of the chip / Output end and the guide pin, and electrically connected with the frequency m of said sheet into a BB / output of the frequency

]76]]石夕品·ptd第第0页1248184 V. Invention description (5) Electrical connection; and a package of colloid, covering the wafer, bonding wire, part of the south frequency electrical connection and part The lead frame is arranged such that the surface of the wafer holder on which the wafer is not connected and the surface of the high-frequency electrical connection portion that are not connected to the bonding wire are exposed outside the package. The method for manufacturing a high-frequency semiconductor package according to the present invention includes the steps of: preparing a lead frame having a wafer holder and a plurality of lead pins, and extending a plurality of high-frequency electrical connecting portions around the wafer holder; Connecting the high-frequency electrical connection portion and the wafer holder with an insulating member; partially removing the high-frequency electrical connection portion to electrically separate the high-frequency electrical connection portion from the wafer holder; on the wafer holder A wafer is attached, and the active surface of the wafer has a high frequency input/output terminal and a non-high frequency input/output terminal respectively; the non-high frequency input/output terminal and the guide are electrically connected to the wafer by a plurality of bonding wires a foot, and electrically connecting the high frequency input/output end of the chip and the high frequency electrical connection portion; and performing a molding process to fill an encapsulant, so that the encapsulant covers the wafer, the bonding wire, the insulating member, The high-frequency electrical connection portion and the partial lead frame are disposed, and the surface of the wafer holder on which the unattached wafer is attached and the surface of the high-frequency electrical connection portion not connected to the bonding wire are exposed outside the package. Meanwhile, the lead frame of the present invention comprises: a wafer holder; a plurality of lead legs are formed around the wafer holder; and a plurality of high frequency electrical connection portions are formed on the wafer holder and the guide pin It is electrically separated from the wafer holder. The high-frequency electrical connection portion is connected to the wafer holder by an insulating member so as not to be in direct contact with the wafer holder and electrically separated, and the insulating member can use a non-conductive film (Tape); The method is to first apply the high frequency electrical property.

]761]石夕品.ptd第1页1248184 V. Description of the invention (6) The connection portion is defined as a wire bonding segment, an insulating member bonding segment and a segment to be removed, and the periphery of the wafer holder Extending a plurality of protrusions, and the insulating member is adhered to the insulating member bonding portion and the protruding portion to connect the high-frequency electrical connecting portion and the wafer holder, thereby removing the to-be-removed portion And electrically disconnecting the electrical connection portion from the wafer holder. In addition, the high-frequency electrical connection portions are respectively formed on each side of the wafer holder and are coplanar with the wafer holder, and the plurality of high-frequency electrical connection portions are arranged at intervals from a plurality of adjacent guide pins, and the height is high. The position, number, shape, and size of the frequency-electrical connection portion are not limited as long as the type of the package and the wafer is "determined." In summary, the present invention is characterized by being attached to the lead frame. Forming a high-frequency electrical connection portion coplanar with the wafer holder to electrically separate the high-frequency electrical connection portion from the wafer holder and expose the encapsulation colloid by the step of bonding and removing the insulating member, thereby The high-frequency electrical connection portion shortens the transmission path of the high-frequency signal, and solves the problem that the high-frequency chip package cannot be performed by the lead frame by the conventional method. [Embodiment] Hereinafter, embodiments of the present invention will be described by way of specific specific examples. Other persons skilled in the art can easily understand other advantages and effects of the ten inventions by the contents disclosed in the present specification. The present invention can also be implemented or applied by other different specific examples. The details of the book may also be based on the same concepts and applications, and various changes and modifications without departing from the spirit of the invention. 1 Α first to FIG. 1 Ε is the high-frequency semiconductor package proposed by the present invention

] 76Π石夕品.ptd Page 12 1248184 V. Description of the invention (7) A preferred embodiment of the method, first, as shown in Figure A, -10, has a wafer holder 11 and a majority of the lead 1 2, and complex: the two lead frames know the same lead frame, but the square wafer holder is surrounded by four reverse! : a plurality of high-frequency electrical connections with the singularity of the singularity of the singularity; and a second extension 30, wherein the high-frequency electrical connection 2 〇 and the protrusion - the convex column, and the The high-frequency electrical connection portion 2 is divided into a welding, a boring, a spacer, a 20 a, a film bonding section 2 〇 b and a to-be-removed section 2 〇 c, and the height is further a length of 2 〇 The protrusion is longer than the protrusion 3〇 so that the convex connection only corresponds to the position of the film bonding section 2〇b^length$out part 30 of the high-frequency electrical connection part 2 The position of the majority of the pedals 2 is: the high-frequency electrical connection portion 20 is also spaced apart from the guide pin 2; then, the image is attached to the wafer holder i by four insulating films 35, respectively. } The four edges = the surrounding position, and the high-frequency electrical connecting portions 2 〇 and the protruding portions 3 同一 on the same side are connected to each other' and the έ海修片3 5 is attached to the high frequency as shown in the figure. The film bonding section 2 〇b of the electrical connecting portion 20 and the front end 3 0 a of the protruding portion 30 are formed. The film 35 is still separated from the edge of the wafer holder 11 by a distance (the distance is the length of the segment 20 0 c of the south-frequency pen connection 20), and the film 35 can also be used. Replace the other adhesive parts; as in the first figure [Fig., cut off the segments 2 〇c on each high-frequency electrical connection 2 以 with the cutter removal, so that each high-frequency electrical property The connecting portion 2 仅 only leaves the bonding wire connecting portion 2 〇a and the bonding portion 2 0 b. At this time, the high-frequency electrical connecting portion 20 will no longer be in direct contact with the f-seat 1 1 . And only by the film 35 indirectly connected to the protrusion = with the wafer holder 1 1, and since the film 35 is an insulating material, & % #hai most of the high-frequency electrical connection 20 Will be electrically separated from the wafer holder 1 1

]]]]矽品.ptd第第3页 1248184 V. Invention Description (8) " ---- State 2 This completes the special lead frame 1 disclosed in the present invention. Next, as shown in FIG. 1D, a high-frequency wafer 4 is bonded to the wafer holder u of the special lead frame 1 by its non-active surface 40b, and the wafer = surface 40 & Each has a high frequency input/output (I / 〇) end 4 1 piece, 1 2: Ϊ person / output end 42, the input / wheel end 41, 42 is also the pad on the crystal action surface 40a (Pad ), according to the end of the 4 1 and A pair of 古 古 古 古 古 古 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 20 20 20 20 20 20 接 接 接 接 接 接 接 接 接 接 接 接The segment guide pin 12 舆 卜 界 界 印刷 印刷 印刷 印刷 印刷 印刷 ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ m "Printed circuit board" at this time 'Because the path of the transmission wheel is not as good as the guiding light. The amplitude of the high-frequency signal is transmitted to the outer cymbal 2: the second long can be filled with a package colloid 50, j rate, Taking the post-cutting die-cutting package encapsulation 50 to cover the cross-sectional view of the month of the month, the joint portion 20 and the portion; the bonding wire '43: film 35, part of the high-frequency film 4 0 below the surface i } a, ancient and "Hai wafer holder 1 1 is not connected to the crystal, the surface 2〇〇a, the disk guide; the pen-shaped connection portion 20 of the bonding wire is connected to the colloid 50, the lead; the guide leg 1 reveals the package 12 The outer leg portion 12a is connected to the ridge to the bottom surface 2 〇〇 a and the guide pin ^ ^; ί ; : ; ; " - ^ crystal ". Heat, lifting the package; = surface (1) dissipating the 1248184 V. Description of the invention (9) Therefore, the special lead frame 10 proposed by the present invention and its high-frequency electrical connection portion 20 are designed to make the crystal moon 4 The high-frequency signal on 0 is transmitted from the wafer 40 to the outside through the bonding wire 4 3 and the bonding wire connection portion 20 of the high-frequency electrical connection portion 20, and the transmission path is transmitted farther than the pin 12 The non-high frequency signal is short, and there is no longer a problem that is difficult to apply to high frequency products (greater than 2 G Η z). At the same time, with this design, the lead frame can be used for high frequency chips. Packaging, without the need for high-cost and complex substrate packaging technology, is more in line with the mass production needs of the industry, and does not cause conventional problems such as wire frame warpage or wire breakage, as other conventional technologies, greatly improving the existing Product quality and reliability. In addition, in the lead frame 10 disclosed in the present invention, the design of the high-frequency electrical connection portion 20 is not limited to the design of the foregoing embodiment, and the position, the number and the size of the lead frame are different depending on the type and layout of the wafer. If the design of the chip is complicated and there are many high-frequency input/output terminals, more high-frequency electrical connection portions 20 can be designed. Conversely, the second embodiment can also be as shown in FIG. And a high-frequency electrical connection portion 2 1 0 is formed on only two opposite sides of the wafer holder 11 to be applied to the high-frequency wafer 4 1 0 with low frequency input/output terminals, and the reduction is further reduced. Manufacturing and processing costs for leadframe 10. In summary, the present invention is characterized in that a high-frequency electrical connection portion coplanar with a wafer holder is formed on a conventional lead frame, so that the high-frequency electrical connection is made by the bonding and removing steps of the insulating member. The portion is electrically separated from the wafer holder and the encapsulant is exposed, so that the high-frequency electrical connection portion can shorten the transmission path of the high-frequency signal, and the conventional problem can be solved. As for the design position and the number of the high-frequency electrical connection portion , shape and size, depending on the type of package and wafer

___ Π6]]石夕品.ptd Page 15 1248184 V. Description of the invention (ίο) Depending on the class or requirement, it is not a limitation of the invention. The above examples are merely illustrative of the principles of the invention and its effects, and are not intended to limit the invention. Modifications and variations of the above-described embodiments can be made by those skilled in the art without departing from the spirit and scope of the invention. Therefore, the scope of protection of the present invention should be as set forth in the scope of the patent application to be described later.

]]]]] product] ptd page 16 1248184 BRIEF DESCRIPTION OF THE DRAWINGS [Brief Description] FIG. 1A to FIG. 1E are flowcharts showing a preferred embodiment of a high frequency semiconductor package of the present invention, wherein 1 C is a top view of the lead frame proposed by the present invention, and FIG. 1E is a cross-sectional view of the high frequency semiconductor package proposed by the present invention; FIG. 2 is a second embodiment of the lead frame proposed by the present invention. Figure 3 is a cross-sectional view of a conventional wafer holder exposed package; Figure 4A is a top view of the lead frame disclosed in U.S. Patent No. 6,3,8,7,6, and Figure 4B A cross-sectional view of a semiconductor package disclosed in U.S. Patent No. 6, 394, 716; and a schematic view of warpage and wire breakage of the semiconductor package of Fig. 4B. 10 lead frame 11 wafer holder 1 la wafer holder lower surface 12 lead 12a outer guide leg 20 frequency electrical connection 20a wire bonding segment 20b film bonding segment 20c to be removed segment 2 0 0 a wire bonding Segment lower surface ^ 21 0 high frequency electrical connection portion 30 projection portion, 30a projection front end 35 film 40 wafer 40a active surface 40b non-active surface 41 frequency m in / out

Π6]]Shi Xipin.ptd Page 17 1248184

Brief description of the system 410 wafer 42 non-frequency input/output terminal 43 bonding wire 50 encapsulant 60 lead frame 61 wafer holder 62 lead 63 wafer 64 bonding wire 65 pad 66 encapsulant 70 lead frame 71 wafer holder 72 conductive pad 73 Article 74 Frame 75 Support strip 80 Package 1 Wafer 82 Bond wire 83 Package colloid C Wire bond break] 761] Shi Xipin.ptd Page]

Claims (1)

1248184 VI. Patent Application No. 1. A south-frequency semiconductor package includes a lead frame having a wafer holder and a plurality of lead pins; and a plurality of high-frequency electrical connecting portions are formed around the wafer holder and The wafer holder is electrically separated; the wafer has an active surface and an inactive surface, and is attached to the wafer holder with its non-active surface, and the active surface has a high frequency input/output terminal and a non-high Frequency input/output terminal; a plurality of bonding wires are electrically connected to the non-high frequency input/output terminal of the chip and the guiding pin, and are electrically connected to the high frequency input/output terminal of the chip and the high frequency power And a package colloid covering the wafer, the bonding wire, the part of the high-frequency electrical connection portion and the partial lead frame, so that the surface of the wafer holder not connected to the wafer is electrically connected to the high frequency The surface of the portion of the soldering wire that is not connected to the portion is exposed outside the package. 2. The high-frequency semiconductor package of claim 1, wherein each of the sides of the wafer holder is formed with a plurality of high-frequency electrical connections electrically separated from the wafer holder. 3. The high frequency semiconductor package of claim 1, wherein the high frequency electrical connection is connected to the wafer holder by an insulating member and is not in direct contact with the wafer holder. 4. The high frequency semiconductor package of claim 3, wherein the insulating member is a non-conductive film (T a p e ). 5. The high frequency semiconductor package of claim 1, wherein the plurality of high frequency electrical connections are spaced apart from a plurality of adjacent leads J]76]] Shi Xipin.ptd Page 19 1248184 VI. Application for patent scope Column. 6. The high-frequency semiconductor package of claim 1, wherein the high-frequency electrical connection portion is respectively divided into a bonding wire connection portion and an insulating member bonding portion. 7. The high frequency semiconductor package of claim 1, wherein a plurality of protrusions extend around the wafer holder. 8. The high-frequency semiconductor package of claim 3, wherein the high-frequency electrical connection portion is respectively divided into a bonding wire connection portion and an insulating member bonding portion, and the periphery of the wafer holder is extended a plurality of protruding portions, and the insulating members are respectively adhered to the insulating member bonding portion on the high-frequency electrical connecting portion and the protruding portion on the wafer holder to connect the high-frequency electrical connecting portion and the wafer holder . 9. The high frequency semiconductor package of claim 1, wherein the surface of the high frequency electrical connection portion to which the bonding wire is not connected is electrically connected to the external printed circuit board. The high frequency semiconductor package of claim 1, wherein the high frequency semiconductor package is a wafer holder exposed (E X ρ s s e d P a d ) package. 1 1. A method for manufacturing a high-frequency semiconductor package, the method comprising: preparing a lead frame having a wafer holder and a plurality of lead pins, and extending a plurality of high-frequency electrical connecting portions around the wafer holder; The high-frequency electrical connection portion and the wafer holder are connected to the insulating member, and the high-frequency electrical connection portion is partially removed to electrically separate the high-frequency electrical connection portion from the wafer holder; ]761 ]石夕品.ptd Page 20 1248184 VI. The patent application scope is to connect a wafer on the wafer holder, and the surface of the wafer has a south frequency input/output terminal and a non-span frequency input/output respectively. The plurality of bonding wires are electrically connected to the non-high frequency input/output terminal of the chip and the guiding pin, and are electrically connected to the high frequency input/output terminal of the chip and the high frequency electrical connection portion; and performing a molding process Filling a package colloid, so that the encapsulant covers the wafer, the bonding wire, the insulating member, the part of the high-frequency electrical connection portion and the partial lead frame, and the surface of the wafer holder on which the wafer is not connected The surface of the high-frequency electrical connection portion on which the bonding wire is not connected is exposed outside the package rubber. 1 2. The method of manufacturing a high frequency semiconductor package according to claim 1 , wherein a plurality of high frequency electrical connections are respectively extended around each side of the wafer holder. The method for manufacturing a high-frequency semiconductor package according to the first aspect of the invention, wherein the high-frequency electrical connection portion is electrically separated from the wafer holder, and the insulating member is used only with the crystal X seat. connection. 1 . The method of manufacturing a high frequency semiconductor package according to claim 1 , wherein the insulating member is a non-conductive film (T a p e ). 1 . The method of claim 1 , wherein the plurality of high frequency electrical connections are spaced apart from a plurality of adjacent guide legs. 1 6 . The method for manufacturing a high-frequency semiconductor package according to claim 1 , wherein the high-frequency electrical connection portion is respectively divided into wire bonding 176]]矽品· ptd Page 21 1248184_ VI. Patent application section, the insulating part bonding section and the to-be-removed section, and directly connected to the wafer holder with the to-be-removed section. The method of manufacturing the high-frequency semiconductor package of claim 11, wherein a plurality of protrusions are further extended around the wafer holder. 1 . The method for manufacturing a high-frequency semiconductor package according to claim 1 , wherein the high-frequency electrical connection portion is respectively divided into a wire bonding section, an insulating component bonding section and a to-be-removed section. a plurality of protrusions extending from the periphery of the wafer holder, and the insulating members are respectively adhered to the insulating member bonding portion on the high-frequency electrical connection portion and the protruding portion on the wafer holder to be connected The high frequency electrical connection portion and the wafer holder. 1 9 . The method for manufacturing a high-frequency semiconductor package according to claim 16 , wherein a part of the high-frequency electrical connection is removed, and the high-frequency electrical connection is removed. segment. The method of manufacturing the high-frequency semiconductor package according to the first aspect of the invention, wherein the surface of the high-frequency electrical connection portion to which the bonding wire is not connected is electrically connected to the external printed circuit board. 2 1. The method of claim 1, wherein the south frequency semiconductor package is an exposed pad package. A lead frame comprising: a wafer holder; a plurality of lead pins formed around the wafer holder; and a plurality of high frequency electrical connections formed between the wafer holder and the lead and the wafer The seat is electrically separated. ]76]] Shi Xipin· ptd Page 22 1248184 VI. Application for patent scope 2 3. For the lead frame of claim 2, wherein each side of the wafer holder is formed with a plurality of The wafer holder is electrically separated from the high frequency electrical connection portion. The lead frame of claim 2, wherein the high-frequency electrical connection is connected to the wafer holder by an insulating member without directly contacting the wafer holder. 2 5. The lead frame of claim 24, wherein the insulating member is a non-conductive film (Tape). 2 6. The lead frame of claim 2, wherein the plurality of high frequency electrical connections are spaced apart from a plurality of adjacent guide legs. 2 7. The lead frame of claim 22, wherein the high-frequency electrical connection portion is respectively divided into a bonding line connecting portion and an insulating member bonding portion. 2 8. The lead frame of claim 22, wherein a plurality of projections extend around the wafer holder. 2 9. The lead frame of claim 24, wherein the high-frequency electrical connection portion is respectively divided into a wire bonding portion and an insulating member bonding portion, and the periphery of the wafer holder is further extended a plurality of protruding portions, wherein the insulating members are respectively adhered to the insulating member bonding portion on the high-frequency electrical connecting portion and the protruding portion on the wafer holder to connect the high-frequency electrical connecting portion and the wafer holder . Π61]Shi Xipin.ptd第23页