JP2010086456A5 - - Google Patents
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- Publication number
- JP2010086456A5 JP2010086456A5 JP2008257278A JP2008257278A JP2010086456A5 JP 2010086456 A5 JP2010086456 A5 JP 2010086456A5 JP 2008257278 A JP2008257278 A JP 2008257278A JP 2008257278 A JP2008257278 A JP 2008257278A JP 2010086456 A5 JP2010086456 A5 JP 2010086456A5
- Authority
- JP
- Japan
- Prior art keywords
- central processing
- interrupt
- processing unit
- register
- issued
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000004913 activation Effects 0.000 claims 15
- 239000004065 semiconductor Substances 0.000 claims 7
- 238000000034 method Methods 0.000 claims 3
- 230000007423 decrease Effects 0.000 claims 1
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2008257278A JP5322567B2 (ja) | 2008-10-02 | 2008-10-02 | データ処理システム及び半導体集積回路 |
| US12/558,508 US8239600B2 (en) | 2008-10-02 | 2009-09-12 | Data processing system with selectable interrupt control |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2008257278A JP5322567B2 (ja) | 2008-10-02 | 2008-10-02 | データ処理システム及び半導体集積回路 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2010086456A JP2010086456A (ja) | 2010-04-15 |
| JP2010086456A5 true JP2010086456A5 (enExample) | 2011-11-17 |
| JP5322567B2 JP5322567B2 (ja) | 2013-10-23 |
Family
ID=42076690
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2008257278A Expired - Fee Related JP5322567B2 (ja) | 2008-10-02 | 2008-10-02 | データ処理システム及び半導体集積回路 |
Country Status (2)
| Country | Link |
|---|---|
| US (1) | US8239600B2 (enExample) |
| JP (1) | JP5322567B2 (enExample) |
Families Citing this family (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP5512383B2 (ja) * | 2010-05-12 | 2014-06-04 | ルネサスエレクトロニクス株式会社 | 計算機システム |
| US20140007098A1 (en) * | 2011-12-28 | 2014-01-02 | Paul M. Stillwell, Jr. | Processor accelerator interface virtualization |
| US10387343B2 (en) | 2015-04-07 | 2019-08-20 | International Business Machines Corporation | Processing of events for accelerators utilized for parallel processing |
| JP7295780B2 (ja) * | 2019-11-05 | 2023-06-21 | ルネサスエレクトロニクス株式会社 | 半導体装置及びその動作方法 |
Family Cites Families (24)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0658654B2 (ja) * | 1984-02-28 | 1994-08-03 | 株式会社東芝 | 割込み受付け制御方式 |
| JPS61206064A (ja) * | 1985-03-08 | 1986-09-12 | Fuji Electric Co Ltd | マルチコンピユ−タシステムにおける共通入出力装置制御方式 |
| JPS63163656A (ja) | 1986-12-26 | 1988-07-07 | Hitachi Ltd | 入出力割込み方法およびシステム |
| US4959781A (en) * | 1988-05-16 | 1990-09-25 | Stardent Computer, Inc. | System for assigning interrupts to least busy processor that already loaded same class of interrupt routines |
| JPH01295355A (ja) * | 1988-05-24 | 1989-11-29 | Fanuc Ltd | マルチマスタバス用割込制御回路 |
| JPH03156559A (ja) * | 1989-11-14 | 1991-07-04 | Nec Corp | マルチプロセッサシステムに於ける割込み処理方式 |
| JPH0512173A (ja) * | 1991-07-08 | 1993-01-22 | Canon Inc | 情報処理装置 |
| SG48803A1 (en) * | 1993-04-19 | 1998-05-18 | Intel Corp | Programmable multi-processor interrupt controller system with a processor integrated local interrupt controller |
| US5511200A (en) * | 1993-12-01 | 1996-04-23 | Intel Corporation | Method and apparatus for providing an enhanced programmable priority interrupt controller |
| JPH0816531A (ja) * | 1994-06-28 | 1996-01-19 | Hitachi Ltd | プロセススケジュール方式 |
| JPH10260932A (ja) * | 1997-03-17 | 1998-09-29 | Fujitsu Ltd | 割込制御方法 |
| JPH10340128A (ja) * | 1997-06-10 | 1998-12-22 | Hitachi Ltd | データ処理装置及び移動体通信端末装置 |
| JP3008896B2 (ja) * | 1997-06-16 | 2000-02-14 | 日本電気株式会社 | 共有バス型マルチプロセッサシステムの割り込み負荷分散システム |
| US6430643B1 (en) * | 1999-09-02 | 2002-08-06 | International Business Machines Corporation | Method and system for assigning interrupts among multiple interrupt presentation controllers |
| US6748742B2 (en) * | 2000-11-07 | 2004-06-15 | Capstone Turbine Corporation | Microturbine combination systems |
| US6748472B2 (en) * | 2001-02-28 | 2004-06-08 | Koninklijke Philips Electronics N.V. | Method and system for an interrupt accelerator that reduces the number of interrupts for a digital signal processor |
| KR100456630B1 (ko) * | 2001-12-11 | 2004-11-10 | 한국전자통신연구원 | 프로세서간 통신을 위한 인터럽트 중계 장치 및 방법 |
| US7444639B2 (en) * | 2001-12-20 | 2008-10-28 | Texas Insturments Incorporated | Load balanced interrupt handling in an embedded symmetric multiprocessor system |
| JP2004127163A (ja) * | 2002-10-07 | 2004-04-22 | Renesas Technology Corp | マルチプロセッサシステム |
| JP2004220309A (ja) * | 2003-01-15 | 2004-08-05 | Renesas Technology Corp | マルチプロセッサシステム |
| US7275122B2 (en) * | 2004-04-28 | 2007-09-25 | Hewlett-Packard Development Company, L.P. | Method and system for maintaining a desired service level for a processor receiving excessive interrupts |
| US20060112208A1 (en) * | 2004-11-22 | 2006-05-25 | International Business Machines Corporation | Interrupt thresholding for SMT and multi processor systems |
| US7610425B2 (en) * | 2005-08-22 | 2009-10-27 | Sun Microsystems, Inc. | Approach for managing interrupt load distribution |
| US7849247B2 (en) * | 2008-10-14 | 2010-12-07 | Freescale Semiconductor, Inc. | Interrupt controller for accelerated interrupt handling in a data processing system and method thereof |
-
2008
- 2008-10-02 JP JP2008257278A patent/JP5322567B2/ja not_active Expired - Fee Related
-
2009
- 2009-09-12 US US12/558,508 patent/US8239600B2/en not_active Expired - Fee Related
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