JP2010050224A - 半導体装置および半導体装置の製造方法 - Google Patents
半導体装置および半導体装置の製造方法 Download PDFInfo
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- JP2010050224A JP2010050224A JP2008211962A JP2008211962A JP2010050224A JP 2010050224 A JP2010050224 A JP 2010050224A JP 2008211962 A JP2008211962 A JP 2008211962A JP 2008211962 A JP2008211962 A JP 2008211962A JP 2010050224 A JP2010050224 A JP 2010050224A
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- electrode pad
- region
- insulating film
- semiconductor substrate
- semiconductor device
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Abstract
【解決手段】半導体装置は、表面に少なくとも1つの電極パッドが形成された半導体基板と、電極パッドに接続された再配線層と、半導体基板を封止する封止部とを含む。電極パッドは再配線層との接続部を有する第1領域と、半導体基板の検査工程で検査プローブが当接される第2領域とからなる。半導体装置は、半導体基板上に電極パッドを覆う絶縁膜を形成する工程と、絶縁膜に開口部を形成し、開口部において電極パッドの第1領域を露出させる工程と、絶縁膜の開口部において露出した電極パッドに接続され、且つ電極パッドの第2領域の上方を覆う再配線層を絶縁膜上に形成する工程と、樹脂を用いて絶縁膜および再配線層を覆うように樹脂封止部を形成する工程と、を経て製造される。
【選択図】図2
Description
11 電極パッド
11a コンタクト用領域
11b 検査用領域
13 絶縁膜
15 UBM膜
16 再配線層
17 封止樹脂
19 半田バンプ
100 プローブ痕
Claims (7)
- 表面に少なくとも1つの電極パッドが形成された半導体基板と、前記電極パッドに接続された再配線層と、前記半導体基板を封止する封止部とを含み、前記電極パッドは前記再配線層に接続される接続部を含む第1領域と、前記第1領域以外の第2領域とからなる半導体装置の製造方法であって、
前記半導体基板上に前記電極パッドを覆うように絶縁膜を形成する工程と、
前記電極パッドの前記第1領域を露出させる開口部を前記絶縁膜に形成する工程と、
前記開口部から露出した前記電極パッドに接続され、且つ前記電極パッドの前記第2領域の上方を覆うように前記再配線層を前記絶縁膜上に形成する工程と、
樹脂を用いて前記絶縁膜および前記再配線層を覆うように樹脂封止部を形成する工程と、を含むことを特徴とする半導体装置の製造方法。 - 表面に少なくとも1つの電極パッドが形成された半導体基板と、前記電極パッドに接続された再配線層と、前記半導体基板を封止する封止部とを含み、前記電極パッドは前記再配線層との接続部を有する第1領域と、プローブの当接によって形成された突起部を有する第2領域とからなる半導体装置の製造方法であって、
少なくとも前記電極パッドの前記第1領域と前記突起部の下方部分とを覆うように絶縁膜を前記半導体基板上に形成する工程と、
前記電極パッドの前記第1領域を露出させる開口部を前記絶縁膜に形成する工程と、
前記開口部において露出した前記電極パッドの前記第1領域に接続され、且つ前記絶縁膜の表面から突出した前記突起部の上方部分を覆うように前記再配線層を前記絶縁膜上に形成する工程と、
樹脂を用いて前記絶縁膜および前記再配線層を覆うように樹脂封止部を形成する工程と、を含むことを特徴とする半導体装置の製造方法。 - 前記再配線層を形成する工程は、前記絶縁膜の前記開口部において露出した前記電極パッドの前記第1領域と、前記絶縁膜の表面から突出した前記突起部の上方部分を覆うようにバリア層およびめっきシード層を順次堆積させる工程と、前記めっきシード層上に電界めっき法によって導電層を形成する工程とを含むことを特徴とする請求項2に記載の半導体装置の製造方法。
- 表面に少なくとも1つの電極パッドが形成された半導体基板と、前記電極パッドに接続された再配線層と、前記半導体基板を封止する封止部と、を含む半導体装置であって、
前記電極パッドは前記再配線層との接続部を有する第1領域と、前記第1領域以外の第2領域とからなり、
前記半導体基板上に設けられて前記電極パッドの前記第1領域を露出させる開口部を有し、且つ前記電極パッドの前記第2領域を覆う絶縁膜を有し、
前記再配線層は、前記開口部から露出した前記電極パッドの前記第1領域に接続され、且つ前記電極パッドの前記第2領域の上方を覆うように前記絶縁膜上に延在していることを特徴とする半導体装置。 - 表面に少なくとも1つの電極パッドが形成された半導体基板と、前記電極パッドに接続された再配線層と、前記半導体基板を封止する封止部と、を含む半導体装置であって、
前記電極パッドは前記再配線層との接続部を有する第1領域と、プローブの当接によって形成された突起部を有する第2領域とからなり、
前記半導体基板上に設けられて前記電極パッドの前記第1領域を露出させる開口部を有し、少なくとも前記前記突起部の下方部分を覆う絶縁膜を有し、
前記再配線層は、前記開口部から露出した前記電極パッドの前記第1領域に接続され、且つ前記絶縁膜の表面から突出した前記突起部の上方部分を覆うように前記絶縁膜上に延在していることを特徴とする半導体装置。 - 前記封止部の表面に設けられて前記再配線層に接続された少なくとも1つの外部接続端子を更に有し、
前記電極パッドの前記第1領域は前記第2領域よりも前記外部接続端子から近い位置に配置されており、
前記再配線層は、前記電極パッドとの接続部を挟んで前記外部端子側に向けて伸張している第1伸張部と、前記電極パッドの前記第2領域側に向けて伸張している第2伸張部とを有していることを特徴とする請求項4又は5に記載の半導体装置。 - 前記再配線層は、前記第2伸張部の端部と前記電極パッドの前記第2領域側の端部との前記第2伸張部の伸張方向における距離が25μmよりも小となる位置で終端していることを特徴とする請求項6に記載の半導体装置。
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