JP2009530851A - 低誘電率材料のイン・サイチュの裏側ポリマー除去を含むプラズマ誘電エッチング方法 - Google Patents

低誘電率材料のイン・サイチュの裏側ポリマー除去を含むプラズマ誘電エッチング方法 Download PDF

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Publication number
JP2009530851A
JP2009530851A JP2009501458A JP2009501458A JP2009530851A JP 2009530851 A JP2009530851 A JP 2009530851A JP 2009501458 A JP2009501458 A JP 2009501458A JP 2009501458 A JP2009501458 A JP 2009501458A JP 2009530851 A JP2009530851 A JP 2009530851A
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Japan
Prior art keywords
process gas
polymer
workpiece
hydrogen
electrostatic chuck
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Pending
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JP2009501458A
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Japanese (ja)
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JP2009530851A5 (https=
Inventor
ジェラード エー デルガディーノ
リチャード ハグボーグ
ダグラス エー ジュニア ブッフバーガー
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Applied Materials Inc
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Applied Materials Inc
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Publication of JP2009530851A publication Critical patent/JP2009530851A/ja
Publication of JP2009530851A5 publication Critical patent/JP2009530851A5/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/24—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials
    • H10P50/242—Dry etching; Plasma etching; Reactive-ion etching of semiconductor materials of Group IV materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/282—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
    • H10P50/283—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/286—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of organic materials
    • H10P50/287—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of organic materials by chemical means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P70/00—Cleaning of wafers, substrates or parts of devices
    • H10P70/50—Cleaning of wafers, substrates or parts of devices characterised by the part to be cleaned
    • H10P70/56—Cleaning of wafer backside
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts

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  • Drying Of Semiconductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Cleaning Or Drying Semiconductors (AREA)
JP2009501458A 2006-03-22 2007-03-14 低誘電率材料のイン・サイチュの裏側ポリマー除去を含むプラズマ誘電エッチング方法 Pending JP2009530851A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US11/386,428 US7432209B2 (en) 2006-03-22 2006-03-22 Plasma dielectric etch process including in-situ backside polymer removal for low-dielectric constant material
PCT/US2007/006449 WO2007111837A2 (en) 2006-03-22 2007-03-14 Plasma dielectric etch process including in-situ backside polymer removal for low-dielectric constant material

Publications (2)

Publication Number Publication Date
JP2009530851A true JP2009530851A (ja) 2009-08-27
JP2009530851A5 JP2009530851A5 (https=) 2010-04-30

Family

ID=38534046

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009501458A Pending JP2009530851A (ja) 2006-03-22 2007-03-14 低誘電率材料のイン・サイチュの裏側ポリマー除去を含むプラズマ誘電エッチング方法

Country Status (7)

Country Link
US (1) US7432209B2 (https=)
EP (1) EP1997127A4 (https=)
JP (1) JP2009530851A (https=)
KR (1) KR101019931B1 (https=)
CN (1) CN101536155B (https=)
TW (1) TW200741861A (https=)
WO (1) WO2007111837A2 (https=)

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US8193096B2 (en) 2004-12-13 2012-06-05 Novellus Systems, Inc. High dose implantation strip (HDIS) in H2 base chemistry
US8129281B1 (en) 2005-05-12 2012-03-06 Novellus Systems, Inc. Plasma based photoresist removal system for cleaning post ash residue
CN1978351A (zh) * 2005-12-02 2007-06-13 鸿富锦精密工业（深圳）有限公司 一种模仁保护膜的去除装置及方法
US7740768B1 (en) * 2006-10-12 2010-06-22 Novellus Systems, Inc. Simultaneous front side ash and backside clean
JP4755963B2 (ja) * 2006-10-30 2011-08-24 株式会社東芝 半導体装置の製造方法
US20080141509A1 (en) * 2006-12-19 2008-06-19 Tokyo Electron Limited Substrate processing system, substrate processing method, and storage medium
US8083963B2 (en) * 2007-02-08 2011-12-27 Applied Materials, Inc. Removal of process residues on the backside of a substrate
US8435895B2 (en) 2007-04-04 2013-05-07 Novellus Systems, Inc. Methods for stripping photoresist and/or cleaning metal regions
US9732416B1 (en) 2007-04-18 2017-08-15 Novellus Systems, Inc. Wafer chuck with aerodynamic design for turbulence reduction
US20080260946A1 (en) * 2007-04-20 2008-10-23 United Microelectronics Corp. Clean method for vapor deposition process
US8329593B2 (en) * 2007-12-12 2012-12-11 Applied Materials, Inc. Method and apparatus for removing polymer from the wafer backside and edge
US8419964B2 (en) * 2008-08-27 2013-04-16 Novellus Systems, Inc. Apparatus and method for edge bevel removal of copper from silicon wafers
US8591661B2 (en) * 2009-12-11 2013-11-26 Novellus Systems, Inc. Low damage photoresist strip method for low-K dielectrics
US8094428B2 (en) * 2008-10-27 2012-01-10 Hermes-Microvision, Inc. Wafer grounding methodology
CN102064106B (zh) * 2009-11-18 2013-04-17 无锡华润上华半导体有限公司 孔刻蚀中预去除聚合物的方法
US8721797B2 (en) 2009-12-11 2014-05-13 Novellus Systems, Inc. Enhanced passivation process to protect silicon prior to high dose implant strip
US20110143548A1 (en) 2009-12-11 2011-06-16 David Cheung Ultra low silicon loss high dose implant strip
KR101131740B1 (ko) * 2011-06-20 2012-04-05 주식회사 테라텍 원격 플라즈마 발생장치를 이용한 웨이퍼 뒷면 건식 식각 방법
US9613825B2 (en) 2011-08-26 2017-04-04 Novellus Systems, Inc. Photoresist strip processes for improved device integrity
KR101276318B1 (ko) * 2011-10-12 2013-06-18 주식회사 테라텍 원격 플라즈마 발생장치를 이용한 웨이퍼 뒷면 건식 식각 방법
US9881788B2 (en) 2014-05-22 2018-01-30 Lam Research Corporation Back side deposition apparatus and applications
US9514954B2 (en) 2014-06-10 2016-12-06 Lam Research Corporation Peroxide-vapor treatment for enhancing photoresist-strip performance and modifying organic films
CN106920727B (zh) * 2015-12-24 2018-04-20 中微半导体设备(上海)有限公司 等离子体处理装置及其清洗方法
KR102528559B1 (ko) 2016-07-26 2023-05-04 삼성전자주식회사 대면적 기판 제조 장치
CN111341657A (zh) * 2018-12-19 2020-06-26 夏泰鑫半导体(青岛)有限公司 等离子体处理方法
CN109727857B (zh) * 2018-12-29 2021-06-15 上海华力集成电路制造有限公司 干法刻蚀方法
CN115244655A (zh) 2020-01-03 2022-10-25 朗姆研究公司 站与站之间的背面弯曲补偿沉积的控制
JP7645891B2 (ja) 2020-01-30 2025-03-14 ラム リサーチ コーポレーション 局所応力調整のためのｕｖ硬化
CN113031409B (zh) * 2021-03-03 2024-12-31 苏州子山半导体科技有限公司 一种氧化钒热成像芯片制造中的聚酰亚胺光刻胶去除方法

Citations (2)

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JP2004281528A (ja) * 2003-03-13 2004-10-07 Tokyo Electron Ltd プラズマ処理方法及びプラズマ処理装置
JP2005327957A (ja) * 2004-05-17 2005-11-24 Sony Corp 半導体装置の製造方法

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US6777334B2 (en) * 2002-07-03 2004-08-17 Taiwan Semiconductor Manufacturing Co., Ltd Method for protecting a wafer backside from etching damage
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JP2004281528A (ja) * 2003-03-13 2004-10-07 Tokyo Electron Ltd プラズマ処理方法及びプラズマ処理装置
JP2005327957A (ja) * 2004-05-17 2005-11-24 Sony Corp 半導体装置の製造方法

Also Published As

Publication number Publication date
US7432209B2 (en) 2008-10-07
KR20080106474A (ko) 2008-12-05
CN101536155A (zh) 2009-09-16
WO2007111837A2 (en) 2007-10-04
TW200741861A (en) 2007-11-01
US20070224826A1 (en) 2007-09-27
WO2007111837A3 (en) 2008-10-09
EP1997127A2 (en) 2008-12-03
KR101019931B1 (ko) 2011-03-08
EP1997127A4 (en) 2010-06-02
CN101536155B (zh) 2012-03-21

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