JP2009530851A - 低誘電率材料のイン・サイチュの裏側ポリマー除去を含むプラズマ誘電エッチング方法 - Google Patents
低誘電率材料のイン・サイチュの裏側ポリマー除去を含むプラズマ誘電エッチング方法 Download PDFInfo
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- 239000001257 hydrogen Substances 0.000 claims abstract description 30
- 229910052739 hydrogen Inorganic materials 0.000 claims abstract description 30
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- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 description 1
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31105—Etching inorganic layers
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- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
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- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
- H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3105—After-treatment
- H01L21/311—Etching the insulating layers by chemical or physical means
- H01L21/31127—Etching organic layers
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- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
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Abstract
Description
Claims (20)
- イン・サイチュの裏側ポリマー除去を含むプラズマエッチング方法であって、
カーボンドープされた酸化ケイ素誘電体層を有するワークピースを提供する工程と、
前記ワークピースの表面にフォトレジストマスクを画定する工程と、
前記ワークピースを、エッチングリアクタチャンバにおいて静電チャック上にクランプする工程と、
フルオロ−カーボンベースのプロセスガスを導入し、RFバイアス電力を前記静電チャックへ、RFソース電力をオーバーヘッド電極へ印加して、前記誘電体層の露出した部分をエッチングし、一方で、保護フルオロ−カーボンポリマーを前記フォトレジストマスクに堆積する工程と、
前記フルオロ−カーボンベースのプロセスガスを除去し、水素ベースのプロセスガスを導入し、前記静電チャックのリフトピンを伸ばして、前記静電チャック上に前記ワークピースを上昇し、前記ワークピースの裏側をリアクタチャンバのプラズマに露出し、ポリマーが前記裏側から除去されるまで、RFソース電力を前記オーバーヘッド電極に適用して、前記裏側に以前に堆積したポリマーを還元する工程とを含む方法。 - 前記水素ベースのプロセスガスの導入の際に、前記オーバーヘッド電極に印加された前記RFソース電力がVHF周波数である請求項1記載の方法。
- 前記VHF周波数が約162MHzである請求項2記載の方法。
- 約数百ミリトルの低チャンバ圧で前記裏側から前記ポリマーを除去する間、チャンバ圧を維持する工程を含む請求項2記載の方法。
- 前記チャンバ圧が約500ミリトルである請求項4記載の方法。
- 前記リフトピンを伸ばす工程の直前に、約60〜100℃より低いウェハ温度を設定する工程を含む請求項4記載の方法。
- 前記水素ベースのプロセスガスを除去してフォトレジスト除去プロセスガスを導入する工程と、RFバイアス電力を前記静電チャックに印加して、全てのフォトレジストを前記ワークピースから除去する工程を含む請求項1記載の方法。
- 前記水素プロセスガスが純粋な水素を含有する請求項1記載の方法。
- 前記水素プロセスガスが水素ガスと水蒸気の両方を含有する請求項1記載の方法。
- 水素ベースのプロセスガスを導入する工程が、水素ガスを第1の速度で、水蒸気を第2の速度で、プラズマ生成領域に流す工程を含み、前記第1の速度が前記第2の速度より早い請求項1記載の方法。
- 前記第1の速度が前記第2の速度の10倍以上である請求項10記載の方法。
- 前記第1の速度が前記第2の速度の20倍以上である請求項10記載の方法。
- 前記ワークピースの前記裏側からポリマーを除去している間に印加される前記RFソース電力が、約2000ワットである請求項2記載の方法。
- イン・サイチュの裏側ポリマー除去を含むプラズマエッチング方法であって、
カーボンドープされた酸化ケイ素誘電体層を有するワークピースを提供する工程と、
前記ワークピースの表面にフォトレジストマスクを画定する工程と、
前記ワークピースを、エッチングリアクタチャンバにおいて静電チャック上にクランプする工程と、
フルオロ−カーボンベースのプロセスガスを導入し、RFバイアス電力を前記静電チャックへ、RFソース電力をオーバーヘッド電極へ印加して、前記誘電体層の露出した部分をエッチングし、一方で、保護フルオロ−カーボンポリマーを前記フォトレジストマスクに堆積する工程と、
前記フルオロ−カーボンベースのプロセスガスを除去し、水素ガスと少量の水蒸気の水素ベースのプロセスガスを導入し、前記静電チャックのリフトピンを伸ばして、前記静電チャック上に前記ワークピースを上昇し、前記ワークピースの裏側をリアクタチャンバのプラズマに露出し、ポリマーが前記裏側から除去されるまで、VHF周波数および数千ワットの電力レベルのRFソース電力を前記オーバーヘッド電極に適用し、約数百ミリトルの低チャンバ圧を維持し、一方で、バルクウェハ温度を約60〜100℃未満に設定して、前記裏側に以前に堆積したポリマーを還元する工程とを含む方法。 - 前記水素ベースのプロセスガスを除去してフォトレジスト除去プロセスガスを導入する工程と、RFバイアス電力を前記静電チャックに印加して、全てのフォトレジストを前記ワークピースから除去する工程を含む請求項14記載の方法。
- 前記フォトレジスト除去プロセスガスがアンモニアである請求項15記載の方法。
- 水素ベースのプロセスガスを導入する工程が、水素ガスを第1の速度で、水蒸気を第2の速度でプラズマ生成領域に流す工程を含み、前記第1の速度が前記第2の速度より早い請求項14記載の方法。
- 前記第1の速度が前記第2の速度の10倍以上である請求項17記載の方法。
- 前記第1の速度が前記第2の速度の20倍以上である請求項17記載の方法。
- 前記ワークピースの前記裏側からポリマーを除去している間に印加される前記RFソース電力が約2000ワットであり、前記VHF周波数が約162MHzである請求項14記載の方法。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
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US11/386,428 US7432209B2 (en) | 2006-03-22 | 2006-03-22 | Plasma dielectric etch process including in-situ backside polymer removal for low-dielectric constant material |
PCT/US2007/006449 WO2007111837A2 (en) | 2006-03-22 | 2007-03-14 | Plasma dielectric etch process including in-situ backside polymer removal for low-dielectric constant material |
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JP2009530851A true JP2009530851A (ja) | 2009-08-27 |
JP2009530851A5 JP2009530851A5 (ja) | 2010-04-30 |
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Country | Link |
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US (1) | US7432209B2 (ja) |
EP (1) | EP1997127A4 (ja) |
JP (1) | JP2009530851A (ja) |
KR (1) | KR101019931B1 (ja) |
CN (1) | CN101536155B (ja) |
TW (1) | TW200741861A (ja) |
WO (1) | WO2007111837A2 (ja) |
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CN109727857B (zh) * | 2018-12-29 | 2021-06-15 | 上海华力集成电路制造有限公司 | 干法刻蚀方法 |
CN113031409A (zh) * | 2021-03-03 | 2021-06-25 | 苏州子山半导体科技有限公司 | 一种氧化钒热成像芯片制造中的聚酰亚胺光刻胶去除方法 |
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- 2007-03-14 EP EP07753100A patent/EP1997127A4/en not_active Withdrawn
- 2007-03-14 CN CN2007800099689A patent/CN101536155B/zh not_active Expired - Fee Related
- 2007-03-14 KR KR1020087025399A patent/KR101019931B1/ko not_active IP Right Cessation
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JP2005327957A (ja) * | 2004-05-17 | 2005-11-24 | Sony Corp | 半導体装置の製造方法 |
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WO2007111837A2 (en) | 2007-10-04 |
CN101536155B (zh) | 2012-03-21 |
US20070224826A1 (en) | 2007-09-27 |
TW200741861A (en) | 2007-11-01 |
EP1997127A2 (en) | 2008-12-03 |
KR20080106474A (ko) | 2008-12-05 |
WO2007111837A3 (en) | 2008-10-09 |
EP1997127A4 (en) | 2010-06-02 |
KR101019931B1 (ko) | 2011-03-08 |
US7432209B2 (en) | 2008-10-07 |
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