JP2009521801A - ドープされた半導体物質のエピタキシャル堆積 - Google Patents

ドープされた半導体物質のエピタキシャル堆積 Download PDF

Info

Publication number
JP2009521801A
JP2009521801A JP2008547324A JP2008547324A JP2009521801A JP 2009521801 A JP2009521801 A JP 2009521801A JP 2008547324 A JP2008547324 A JP 2008547324A JP 2008547324 A JP2008547324 A JP 2008547324A JP 2009521801 A JP2009521801 A JP 2009521801A
Authority
JP
Japan
Prior art keywords
carbon
process chamber
deposition
flow
depositing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2008547324A
Other languages
English (en)
Japanese (ja)
Other versions
JP2009521801A5 (enExample
Inventor
マティアス バウアー
Original Assignee
エーエスエム アメリカ インコーポレイテッド
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by エーエスエム アメリカ インコーポレイテッド filed Critical エーエスエム アメリカ インコーポレイテッド
Publication of JP2009521801A publication Critical patent/JP2009521801A/ja
Publication of JP2009521801A5 publication Critical patent/JP2009521801A5/ja
Pending legal-status Critical Current

Links

Images

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/20—Deposition of semiconductor materials on a substrate, e.g. epitaxial growth solid phase epitaxy
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00—Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02—Epitaxial-layer growth
    • C—CHEMISTRY; METALLURGY
    • C30—CRYSTAL GROWTH
    • C30B—SINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B29/00—Single crystals or homogeneous polycrystalline material with defined structure characterised by the material or by their shape
    • C30B29/02—Elements
    • C30B29/06—Silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02529—Silicon carbide
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/0257—Doping during depositing
    • H01L21/02573—Conductivity type
    • H01L21/02576—N-type
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02636—Selective deposition, e.g. simultaneous growth of mono- and non-monocrystalline semiconductor materials
    • H01L21/02639—Preparation of substrate for selective deposition

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Chemical & Material Sciences (AREA)
  • Materials Engineering (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Thin Film Transistor (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Chemical Vapour Deposition (AREA)
JP2008547324A 2005-12-22 2006-12-14 ドープされた半導体物質のエピタキシャル堆積 Pending JP2009521801A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US75456905P 2005-12-22 2005-12-22
PCT/US2006/047646 WO2007078802A2 (en) 2005-12-22 2006-12-14 Epitaxial deposition of doped semiconductor materials

Publications (2)

Publication Number Publication Date
JP2009521801A true JP2009521801A (ja) 2009-06-04
JP2009521801A5 JP2009521801A5 (enExample) 2010-02-12

Family

ID=38228739

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2008547324A Pending JP2009521801A (ja) 2005-12-22 2006-12-14 ドープされた半導体物質のエピタキシャル堆積

Country Status (5)

Country Link
US (1) US7863163B2 (enExample)
JP (1) JP2009521801A (enExample)
KR (1) KR20080089403A (enExample)
TW (1) TWI405248B (enExample)
WO (1) WO2007078802A2 (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014512669A (ja) * 2011-02-23 2014-05-22 インターナショナル・ビジネス・マシーンズ・コーポレーション 低温選択エピタキシー方法
JP2025501548A (ja) * 2021-12-20 2025-01-22 エイチピエスピ カンパニー リミテッド ウェハの薄膜に対する炭素ドーピング方法

Families Citing this family (70)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7528045B2 (en) * 2007-01-31 2009-05-05 United Microelectronics Corp. MOS transistor and manufacturing methods thereof
US9064960B2 (en) * 2007-01-31 2015-06-23 Applied Materials, Inc. Selective epitaxy process control
US7776698B2 (en) * 2007-10-05 2010-08-17 Applied Materials, Inc. Selective formation of silicon carbon epitaxial layer
US7700424B2 (en) * 2008-02-27 2010-04-20 Applied Materials, Inc. Method of forming an embedded silicon carbon epitaxial layer
US20100038715A1 (en) * 2008-08-18 2010-02-18 International Business Machines Corporation Thin body silicon-on-insulator transistor with borderless self-aligned contacts
JP5564311B2 (ja) * 2009-05-19 2014-07-30 株式会社日立国際電気 半導体装置の製造方法、基板処理装置及び基板の製造方法
US8421162B2 (en) 2009-09-30 2013-04-16 Suvolta, Inc. Advanced transistors with punch through suppression
US8273617B2 (en) 2009-09-30 2012-09-25 Suvolta, Inc. Electronic devices and systems, and methods for making and using the same
US8530286B2 (en) 2010-04-12 2013-09-10 Suvolta, Inc. Low power semiconductor transistor structure and method of fabrication thereof
US8569128B2 (en) 2010-06-21 2013-10-29 Suvolta, Inc. Semiconductor structure and method of fabrication thereof with mixed metal types
US8759872B2 (en) 2010-06-22 2014-06-24 Suvolta, Inc. Transistor with threshold voltage set notch and method of fabrication thereof
US8778767B2 (en) * 2010-11-18 2014-07-15 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuits and fabrication methods thereof
US8404551B2 (en) 2010-12-03 2013-03-26 Suvolta, Inc. Source/drain extension control for advanced transistors
US8461875B1 (en) 2011-02-18 2013-06-11 Suvolta, Inc. Digital circuits having improved transistors, and methods therefor
US8525271B2 (en) 2011-03-03 2013-09-03 Suvolta, Inc. Semiconductor structure with improved channel stack and method for fabrication thereof
US8748270B1 (en) 2011-03-30 2014-06-10 Suvolta, Inc. Process for manufacturing an improved analog transistor
US8796048B1 (en) 2011-05-11 2014-08-05 Suvolta, Inc. Monitoring and measurement of thin film layers
US8999861B1 (en) 2011-05-11 2015-04-07 Suvolta, Inc. Semiconductor structure with substitutional boron and method for fabrication thereof
US8811068B1 (en) 2011-05-13 2014-08-19 Suvolta, Inc. Integrated circuit devices and methods
US8569156B1 (en) 2011-05-16 2013-10-29 Suvolta, Inc. Reducing or eliminating pre-amorphization in transistor manufacture
US9218962B2 (en) 2011-05-19 2015-12-22 Globalfoundries Inc. Low temperature epitaxy of a semiconductor alloy including silicon and germanium employing a high order silane precursor
US8735987B1 (en) 2011-06-06 2014-05-27 Suvolta, Inc. CMOS gate stack structures and processes
US8664126B2 (en) * 2011-06-10 2014-03-04 Applied Materials, Inc. Selective deposition of polymer films on bare silicon instead of oxide surface
US8995204B2 (en) 2011-06-23 2015-03-31 Suvolta, Inc. Circuit devices and methods having adjustable transistor body bias
US8629016B1 (en) 2011-07-26 2014-01-14 Suvolta, Inc. Multiple transistor types formed in a common epitaxial layer by differential out-diffusion from a doped underlayer
US8748986B1 (en) 2011-08-05 2014-06-10 Suvolta, Inc. Electronic device with controlled threshold voltage
WO2013022753A2 (en) 2011-08-05 2013-02-14 Suvolta, Inc. Semiconductor devices having fin structures and fabrication methods thereof
US8614128B1 (en) 2011-08-23 2013-12-24 Suvolta, Inc. CMOS structures and processes based on selective thinning
US8645878B1 (en) 2011-08-23 2014-02-04 Suvolta, Inc. Porting a circuit design from a first semiconductor process to a second semiconductor process
US8713511B1 (en) 2011-09-16 2014-04-29 Suvolta, Inc. Tools and methods for yield-aware semiconductor manufacturing process target generation
US9236466B1 (en) 2011-10-07 2016-01-12 Mie Fujitsu Semiconductor Limited Analog circuits having improved insulated gate transistors, and methods therefor
US8895327B1 (en) 2011-12-09 2014-11-25 Suvolta, Inc. Tipless transistors, short-tip transistors, and methods and circuits therefor
US8819603B1 (en) 2011-12-15 2014-08-26 Suvolta, Inc. Memory circuits and methods of making and designing the same
US8883600B1 (en) 2011-12-22 2014-11-11 Suvolta, Inc. Transistor having reduced junction leakage and methods of forming thereof
US8599623B1 (en) 2011-12-23 2013-12-03 Suvolta, Inc. Circuits and methods for measuring circuit elements in an integrated circuit device
US8877619B1 (en) 2012-01-23 2014-11-04 Suvolta, Inc. Process for manufacture of integrated circuits with different channel doping transistor architectures and devices therefrom
US8970289B1 (en) 2012-01-23 2015-03-03 Suvolta, Inc. Circuits and devices for generating bi-directional body bias voltages, and methods therefor
US9093550B1 (en) 2012-01-31 2015-07-28 Mie Fujitsu Semiconductor Limited Integrated circuits having a plurality of high-K metal gate FETs with various combinations of channel foundation structure and gate stack structure and methods of making same
US9406567B1 (en) 2012-02-28 2016-08-02 Mie Fujitsu Semiconductor Limited Method for fabricating multiple transistor devices on a substrate with varying threshold voltages
US8863064B1 (en) 2012-03-23 2014-10-14 Suvolta, Inc. SRAM cell layout structure and devices therefrom
TWI505331B (zh) * 2012-06-19 2015-10-21 Hermes Epitek Corp 磊晶成長製程及結構
US9299698B2 (en) 2012-06-27 2016-03-29 Mie Fujitsu Semiconductor Limited Semiconductor structure with multiple transistors having various threshold voltages
US8610201B1 (en) * 2012-08-16 2013-12-17 Kabushiki Kaisha Toshiba FinFET comprising a punch-through stopper
US8637955B1 (en) 2012-08-31 2014-01-28 Suvolta, Inc. Semiconductor structure with reduced junction leakage and method of fabrication thereof
US9112057B1 (en) 2012-09-18 2015-08-18 Mie Fujitsu Semiconductor Limited Semiconductor devices with dopant migration suppression and method of fabrication thereof
US9041126B2 (en) 2012-09-21 2015-05-26 Mie Fujitsu Semiconductor Limited Deeply depleted MOS transistors having a screening layer and methods thereof
CN104854698A (zh) 2012-10-31 2015-08-19 三重富士通半导体有限责任公司 具有低变化晶体管外围电路的dram型器件以及相关方法
US8816754B1 (en) 2012-11-02 2014-08-26 Suvolta, Inc. Body bias circuits and methods
US9093997B1 (en) 2012-11-15 2015-07-28 Mie Fujitsu Semiconductor Limited Slew based process and bias monitors and related methods
US9070477B1 (en) 2012-12-12 2015-06-30 Mie Fujitsu Semiconductor Limited Bit interleaved low voltage static random access memory (SRAM) and related methods
US9112484B1 (en) 2012-12-20 2015-08-18 Mie Fujitsu Semiconductor Limited Integrated circuit process and bias monitors and related methods
US9268885B1 (en) 2013-02-28 2016-02-23 Mie Fujitsu Semiconductor Limited Integrated circuit device methods and models with predicted device metric variations
US9564321B2 (en) * 2013-03-11 2017-02-07 Taiwan Semiconductor Manufacturing Co., Ltd. Cyclic epitaxial deposition and etch processes
US9299801B1 (en) 2013-03-14 2016-03-29 Mie Fujitsu Semiconductor Limited Method for fabricating a transistor device with a tuned dopant profile
US9478571B1 (en) 2013-05-24 2016-10-25 Mie Fujitsu Semiconductor Limited Buried channel deeply depleted channel transistor
US9112030B2 (en) 2013-11-04 2015-08-18 United Microelectronics Corp. Epitaxial structure and process thereof for non-planar transistor
US9412843B2 (en) * 2014-05-23 2016-08-09 International Business Machines Corporation Method for embedded diamond-shaped stress element
DE102014108352A1 (de) * 2014-06-13 2015-12-17 Forschungszentrum Jülich GmbH Verfahren zum Abscheiden einer Kristallschicht bei niedrigen Temperaturen, insbesondere einer photolumineszierenden IV-IV-Schicht auf einem IV-Substrat, sowie ein eine derartige Schicht aufweisendes optoelektronisches Bauelement
US9704708B2 (en) * 2014-07-11 2017-07-11 Applied Materials, Inc. Halogenated dopant precursors for epitaxy
US9710006B2 (en) 2014-07-25 2017-07-18 Mie Fujitsu Semiconductor Limited Power up body bias circuits and methods
US9319013B2 (en) 2014-08-19 2016-04-19 Mie Fujitsu Semiconductor Limited Operational amplifier input offset correction with transistor threshold voltage adjustment
CN105609406B (zh) * 2014-11-19 2018-09-28 株式会社日立国际电气 半导体器件的制造方法、衬底处理装置、气体供给系统
US9761693B2 (en) 2014-11-27 2017-09-12 United Microelectronics Corp. Method for fabricating semiconductor device
US20160155818A1 (en) * 2014-11-27 2016-06-02 United Microelectronics Corp. Method for fabricating semiconductor device
US10431654B2 (en) 2015-06-25 2019-10-01 International Business Machines Corporation Extrinsic base doping for bipolar junction transistors
US9853129B2 (en) 2016-05-11 2017-12-26 Applied Materials, Inc. Forming non-line-of-sight source drain extension in an nMOS finFET using n-doped selective epitaxial growth
RU2733941C2 (ru) * 2019-04-01 2020-10-08 Федеральное государственное бюджетное образовательное учреждение высшего образования "Кабардино-Балкарский государственный университет им. Х.М. Бербекова" (КБГУ) Способ изготовления полупроводниковой структуры
KR102742581B1 (ko) 2019-09-24 2024-12-13 삼성전자주식회사 반도체 소자 및 이의 제조 방법
CN115627454A (zh) * 2022-10-28 2023-01-20 长鑫存储技术有限公司 一种薄膜沉积方法、薄膜及存储器
CN117690954B (zh) * 2024-02-01 2024-05-07 合肥晶合集成电路股份有限公司 一种半导体器件及其制作方法

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06326037A (ja) * 1993-05-13 1994-11-25 Nec Corp シリコンエピタキシャル膜の成長方法およびその装置
WO2005076326A1 (ja) * 2004-02-10 2005-08-18 Renesas Technology Corp. 半導体装置の製造方法
WO2005116304A2 (en) * 2004-04-23 2005-12-08 Asm America, Inc. In situ doped epitaxial films
JP2006515955A (ja) * 2002-10-18 2006-06-08 アプライド　マテリアルズ　インコーポレイテッド シリコン化合物によるシリコン含有層の堆積
JP2007537601A (ja) * 2004-05-14 2007-12-20 アプライド　マテリアルズ　インコーポレイテッド 選択的堆積プロセスを使用したｍｏｓｆｅｔデバイスの作製方法

Family Cites Families (118)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SE393967B (sv) 1974-11-29 1977-05-31 Sateko Oy Forfarande och for utforande av stroleggning mellan lagren i ett virkespaket
FI57975C (fi) 1979-02-28 1980-11-10 Lohja Ab Oy Foerfarande och anordning vid uppbyggande av tunna foereningshinnor
US5769950A (en) 1985-07-23 1998-06-23 Canon Kabushiki Kaisha Device for forming deposited film
US4910153A (en) 1986-02-18 1990-03-20 Solarex Corporation Deposition feedstock and dopant materials useful in the fabrication of hydrogenated amorphous silicon alloys for photovoltaic devices and other semiconductor devices
US4761269A (en) 1986-06-12 1988-08-02 Crystal Specialties, Inc. Apparatus for depositing material on a substrate
US4747367A (en) 1986-06-12 1988-05-31 Crystal Specialties, Inc. Method and apparatus for producing a constant flow, constant pressure chemical vapor deposition
US5071670A (en) 1990-06-11 1991-12-10 Kelly Michael A Method for chemical vapor deposition under a single reactor vessel divided into separate reaction chambers each with its own depositing and exhausting means
US5153295A (en) 1990-07-20 1992-10-06 Rensselaer Polytechnic Institute Carbosilane polymer precursors to silicon carbide ceramics
US5068203A (en) 1990-09-04 1991-11-26 Delco Electronics Corporation Method for forming thin silicon membrane or beam
US5124278A (en) 1990-09-21 1992-06-23 Air Products And Chemicals, Inc. Amino replacements for arsine, antimony and phosphine
US5225032A (en) * 1991-08-09 1993-07-06 Allied-Signal Inc. Method of producing stoichiometric, epitaxial, monocrystalline films of silicon carbide at temperatures below 900 degrees centigrade
JPH05343350A (ja) 1992-06-08 1993-12-24 Mitsubishi Electric Corp 半導体装置およびその製造方法
US5175330A (en) 1992-07-16 1992-12-29 Dow Corning Corporation Process for the recovery of hydrogen chloride and monomeric alkoxysilanes from mixtures of chloride-containing silicon compounds
US5306666A (en) 1992-07-24 1994-04-26 Nippon Steel Corporation Process for forming a thin metal film by chemical vapor deposition
US6004683A (en) 1992-11-04 1999-12-21 C. A. Patents, L.L.C. Plural layered metal repair tape
US5656531A (en) 1993-12-10 1997-08-12 Micron Technology, Inc. Method to form hemi-spherical grain (HSG) silicon from amorphous silicon
WO1995026571A1 (en) 1994-03-25 1995-10-05 Amoco/Enron Solar Stabilized amorphous silicon and devices containing same
FI97731C (fi) 1994-11-28 1997-02-10 Mikrokemia Oy Menetelmä ja laite ohutkalvojen valmistamiseksi
US6153920A (en) * 1994-12-01 2000-11-28 Lucent Technologies Inc. Process for controlling dopant diffusion in a semiconductor layer and semiconductor device formed thereby
JPH08213343A (ja) 1995-01-31 1996-08-20 Sony Corp 半導体装置およびその製造方法
DE19520175A1 (de) 1995-06-01 1996-12-12 Wacker Siltronic Halbleitermat Verfahren zur Herstellung einer epitaktisch beschichteten Halbleiterscheibe
US5654589A (en) 1995-06-06 1997-08-05 Advanced Micro Devices, Incorporated Landing pad technology doubled up as local interconnect and borderless contact for deep sub-half micrometer IC application
US5869389A (en) 1996-01-18 1999-02-09 Micron Technology, Inc. Semiconductor processing method of providing a doped polysilicon layer
US5916365A (en) 1996-08-16 1999-06-29 Sherman; Arthur Sequential chemical vapor deposition
KR100236069B1 (ko) 1996-12-26 1999-12-15 김영환 캐패시터 및 그 제조방법
JP3050152B2 (ja) 1997-01-23 2000-06-12 日本電気株式会社 半導体装置の製造方法
US5879459A (en) 1997-08-29 1999-03-09 Genus, Inc. Vertically-stacked process reactor and cluster tool system for atomic layer deposition
US6351039B1 (en) 1997-05-28 2002-02-26 Texas Instruments Incorporated Integrated circuit dielectric and method
US6069068A (en) 1997-05-30 2000-05-30 International Business Machines Corporation Sub-quarter-micron copper interconnections with improved electromigration resistance and reduced defect sensitivity
US5904565A (en) 1997-07-17 1999-05-18 Sharp Microelectronics Technology, Inc. Low resistance contact between integrated circuit metal levels and method for same
US6287965B1 (en) 1997-07-28 2001-09-11 Samsung Electronics Co, Ltd. Method of forming metal layer using atomic layer deposition and semiconductor device having the metal layer as barrier metal layer or upper or lower electrode of capacitor
US6100184A (en) 1997-08-20 2000-08-08 Sematech, Inc. Method of making a dual damascene interconnect structure using low dielectric constant material for an inter-level dielectric layer
KR100274603B1 (ko) 1997-10-01 2001-01-15 윤종용 반도체장치의제조방법및그의제조장치
TW439151B (en) 1997-12-31 2001-06-07 Samsung Electronics Co Ltd Method for forming conductive layer using atomic layer deposition process
US6042654A (en) 1998-01-13 2000-03-28 Applied Materials, Inc. Method of cleaning CVD cold-wall chamber and exhaust lines
US5933761A (en) 1998-02-09 1999-08-03 Lee; Ellis Dual damascene structure and its manufacturing method
US6303523B2 (en) 1998-02-11 2001-10-16 Applied Materials, Inc. Plasma processes for depositing low dielectric constant films
US6181012B1 (en) 1998-04-27 2001-01-30 International Business Machines Corporation Copper interconnection structure incorporating a metal seed layer
FR2779573B1 (fr) 1998-06-05 2001-10-26 St Microelectronics Sa Transistor bipolaire vertical comportant une base extrinseque de rugosite reduite, et procede de fabrication
US6048790A (en) 1998-07-10 2000-04-11 Advanced Micro Devices, Inc. Metalorganic decomposition deposition of thin conductive films on integrated circuits using reducing ambient
KR100275738B1 (ko) 1998-08-07 2000-12-15 윤종용 원자층 증착법을 이용한 박막 제조방법
US6188134B1 (en) 1998-08-20 2001-02-13 The United States Of America As Represented By The Secretary Of The Navy Electronic devices with rubidium barrier film and process for making same
US6077775A (en) 1998-08-20 2000-06-20 The United States Of America As Represented By The Secretary Of The Navy Process for making a semiconductor device with barrier film formation using a metal halide and products thereof
US6291876B1 (en) 1998-08-20 2001-09-18 The United States Of America As Represented By The Secretary Of The Navy Electronic devices with composite atomic barrier film and process for making same
US6144050A (en) 1998-08-20 2000-11-07 The United States Of America As Represented By The Secretary Of The Navy Electronic devices with strontium barrier film and process for making same
DE19840238C1 (de) 1998-09-03 2000-03-16 Siemens Ag Verfahren zur Herstellung einer dotierten Siliziumschicht und mikroelektronische Struktur mit einem leitfähigen Element aus dotiertem Silizium
KR100287180B1 (ko) 1998-09-17 2001-04-16 윤종용 계면 조절층을 이용하여 금속 배선층을 형성하는 반도체 소자의 제조 방법
TW382787B (en) 1998-10-02 2000-02-21 United Microelectronics Corp Method of fabricating dual damascene
KR100327328B1 (ko) 1998-10-13 2002-05-09 윤종용 부분적으로다른두께를갖는커패시터의유전막형성방버뵤
JP2000150647A (ja) 1998-11-11 2000-05-30 Sony Corp 配線構造およびその製造方法
US6313017B1 (en) 1999-01-26 2001-11-06 University Of Vermont And State Agricultural College Plasma enhanced CVD process for rapidly growing semiconductor films
US6200893B1 (en) 1999-03-11 2001-03-13 Genus, Inc Radical-assisted sequential CVD
DE60037357T2 (de) 1999-03-18 2008-12-04 Kaneka Corp. Härtbare Zusammensetzung
US6207567B1 (en) 1999-04-12 2001-03-27 United Microelectronics Corp. Fabricating method of glue layer and barrier layer
US6197669B1 (en) 1999-04-15 2001-03-06 Taiwan Semicondcutor Manufacturing Company Reduction of surface defects on amorphous silicon grown by a low-temperature, high pressure LPCVD process
US6037258A (en) 1999-05-07 2000-03-14 Taiwan Semiconductor Manufacturing Company Method of forming a smooth copper seed layer for a copper damascene structure
US6146517A (en) 1999-05-19 2000-11-14 Infineon Technologies North America Corp. Integrated circuits with copper metallization for interconnections
KR20010001543A (ko) 1999-06-05 2001-01-05 김기범 구리 배선 구조를 가지는 반도체 소자 제조 방법
JP4726369B2 (ja) 1999-06-19 2011-07-20 エー・エス・エムジニテックコリア株式会社 化学蒸着反応炉及びこれを利用した薄膜形成方法
US6391785B1 (en) 1999-08-24 2002-05-21 Interuniversitair Microelektronica Centrum (Imec) Method for bottomless deposition of barrier layers in integrated circuit metallization schemes
US6727169B1 (en) 1999-10-15 2004-04-27 Asm International, N.V. Method of making conformal lining layers for damascene metallization
US6203613B1 (en) 1999-10-19 2001-03-20 International Business Machines Corporation Atomic layer deposition with nitrate containing precursors
KR20010047128A (ko) 1999-11-18 2001-06-15 이경수 액체원료 기화방법 및 그에 사용되는 장치
US6720262B2 (en) 1999-12-15 2004-04-13 Genitech, Inc. Method of forming copper interconnections and thin films using chemical vapor deposition with catalyst
KR100510996B1 (ko) 1999-12-30 2005-08-31 주식회사 하이닉스반도체 선택적 에피텍셜 성장 공정의 최적화 방법
US6184128B1 (en) 2000-01-31 2001-02-06 Advanced Micro Devices, Inc. Method using a thin resist mask for dual damascene stop layer etch
TW408653U (en) 2000-02-03 2000-10-11 Hu Hou Fei Ratcheting tool
EP1123991A3 (en) 2000-02-08 2002-11-13 Asm Japan K.K. Low dielectric constant materials and processes
WO2001066832A2 (en) 2000-03-07 2001-09-13 Asm America, Inc. Graded thin films
WO2001078123A1 (en) 2000-04-11 2001-10-18 Genitech Co., Ltd. Method of forming metal interconnects
KR100332363B1 (ko) 2000-04-12 2002-04-12 최승철 화학기계적 연마장치의 연마패드를 위한 컨디셔너와 그컨디셔닝 방법
KR100363088B1 (ko) 2000-04-20 2002-12-02 삼성전자 주식회사 원자층 증착방법을 이용한 장벽 금속막의 제조방법
US6458718B1 (en) 2000-04-28 2002-10-01 Asm Japan K.K. Fluorine-containing materials and processes
US6630413B2 (en) 2000-04-28 2003-10-07 Asm Japan K.K. CVD syntheses of silicon nitride materials
US6482733B2 (en) 2000-05-15 2002-11-19 Asm Microchemistry Oy Protective layers prior to alternating layer deposition
AU2001263211A1 (en) 2000-05-26 2001-12-11 Amberwave Systems Corporation Buried channel strained silicon fet using an ion implanted doped layer
US6342448B1 (en) 2000-05-31 2002-01-29 Taiwan Semiconductor Manufacturing Company Method of fabricating barrier adhesion to low-k dielectric layers in a copper damascene process
WO2001099166A1 (en) 2000-06-08 2001-12-27 Genitech Inc. Thin film forming method
TW512529B (en) 2000-06-14 2002-12-01 Infineon Technologies Ag Silicon bipolar transistor, circuit arrangement and method for producing a silicon bipolar transistor
US20040224504A1 (en) 2000-06-23 2004-11-11 Gadgil Prasad N. Apparatus and method for plasma enhanced monolayer processing
US6368954B1 (en) 2000-07-28 2002-04-09 Advanced Micro Devices, Inc. Method of copper interconnect formation using atomic layer copper deposition
AU2001283138A1 (en) 2000-08-07 2002-02-18 Amberwave Systems Corporation Gate technology for strained surface channel and strained buried channel mosfet devices
US20020127766A1 (en) 2000-12-27 2002-09-12 Memc Electronic Materials, Inc. Semiconductor wafer manufacturing process
US6444495B1 (en) 2001-01-11 2002-09-03 Honeywell International, Inc. Dielectric films for narrow gap-fill applications
US6583048B2 (en) 2001-01-17 2003-06-24 Air Products And Chemicals, Inc. Organosilicon precursors for interlayer dielectric films with low dielectric constants
US6713813B2 (en) 2001-01-30 2004-03-30 Fairchild Semiconductor Corporation Field effect transistor having a lateral depletion structure
AU2002306436A1 (en) 2001-02-12 2002-10-15 Asm America, Inc. Improved process for deposition of semiconductor films
US7026219B2 (en) 2001-02-12 2006-04-11 Asm America, Inc. Integration of high k gate dielectric
US6576535B2 (en) * 2001-04-11 2003-06-10 Texas Instruments Incorporated Carbon doped epitaxial layer for high speed CB-CMOS
US6455417B1 (en) * 2001-07-05 2002-09-24 Taiwan Semiconductor Manufacturing Co., Ltd. Method for forming damascene structure employing bi-layer carbon doped silicon nitride/carbon doped silicon oxide etch stop layer
JP2003068654A (ja) * 2001-08-27 2003-03-07 Hoya Corp 化合物単結晶の製造方法
JP4060580B2 (ja) 2001-11-29 2008-03-12 株式会社ルネサステクノロジ ヘテロ接合バイポーラトランジスタ
DE10211312A1 (de) 2002-03-14 2003-10-02 Wacker Siltronic Halbleitermat Verfahren und Vorrichtung zur epitaktischen Beschichtung einer Halbleiterscheibe sowie epitaktisch beschichtete Halbleiterscheibe
US6605498B1 (en) 2002-03-29 2003-08-12 Intel Corporation Semiconductor transistor having a backfilled channel material
US7335545B2 (en) 2002-06-07 2008-02-26 Amberwave Systems Corporation Control of strain in device layers by prevention of relaxation
US7074623B2 (en) 2002-06-07 2006-07-11 Amberwave Systems Corporation Methods of forming strained-semiconductor-on-insulator finFET device structures
US7307273B2 (en) 2002-06-07 2007-12-11 Amberwave Systems Corporation Control of strain in device layers by selective relaxation
WO2003105206A1 (en) 2002-06-10 2003-12-18 Amberwave Systems Corporation Growing source and drain elements by selecive epitaxy
US7186630B2 (en) 2002-08-14 2007-03-06 Asm America, Inc. Deposition of amorphous silicon-containing films
US7045845B2 (en) 2002-08-16 2006-05-16 Semiconductor Components Industries, L.L.C. Self-aligned vertical gate semiconductor device
US7060501B2 (en) 2002-12-03 2006-06-13 Applied Biotechnology Institute Methods for selecting and screening for plant cells transformed with a polynucleotide encoding an organophosphate hydrolase
US7238595B2 (en) 2003-03-13 2007-07-03 Asm America, Inc. Epitaxial semiconductor deposition methods and structures
US7005160B2 (en) 2003-04-24 2006-02-28 Asm America, Inc. Methods for depositing polycrystalline films with engineered grain structures
US7208362B2 (en) 2003-06-25 2007-04-24 Texas Instruments Incorporated Transistor device containing carbon doped silicon in a recess next to MDD to create strain in channel
TWI270986B (en) 2003-07-29 2007-01-11 Ind Tech Res Inst Strained SiC MOSFET
US7208427B2 (en) 2003-08-18 2007-04-24 Advanced Technology Materials, Inc. Precursor compositions and processes for MOCVD of barrier materials in semiconductor manufacturing
US7166528B2 (en) * 2003-10-10 2007-01-23 Applied Materials, Inc. Methods of selective deposition of heavily doped epitaxial SiGe
US7332439B2 (en) * 2004-09-29 2008-02-19 Intel Corporation Metal gate transistors with epitaxial source and drain regions
US7312128B2 (en) 2004-12-01 2007-12-25 Applied Materials, Inc. Selective epitaxy process with alternating gas supply
US7682940B2 (en) 2004-12-01 2010-03-23 Applied Materials, Inc. Use of Cl2 and/or HCl during silicon epitaxial film formation
US7560352B2 (en) 2004-12-01 2009-07-14 Applied Materials, Inc. Selective deposition
US7195985B2 (en) 2005-01-04 2007-03-27 Intel Corporation CMOS transistor junction regions formed by a CVD etching and deposition sequence
US7235492B2 (en) 2005-01-31 2007-06-26 Applied Materials, Inc. Low temperature etchant for treatment of silicon-containing surfaces
US7687383B2 (en) 2005-02-04 2010-03-30 Asm America, Inc. Methods of depositing electrically active doped crystalline Si-containing films
US8105908B2 (en) 2005-06-23 2012-01-31 Applied Materials, Inc. Methods for forming a transistor and modulating channel stress
JP2007188976A (ja) 2006-01-11 2007-07-26 Shinko Electric Ind Co Ltd 発光装置の製造方法
US20080026149A1 (en) 2006-05-31 2008-01-31 Asm America, Inc. Methods and systems for selectively depositing si-containing films using chloropolysilanes
US8278176B2 (en) 2006-06-07 2012-10-02 Asm America, Inc. Selective epitaxial formation of semiconductor films

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06326037A (ja) * 1993-05-13 1994-11-25 Nec Corp シリコンエピタキシャル膜の成長方法およびその装置
JP2006515955A (ja) * 2002-10-18 2006-06-08 アプライド　マテリアルズ　インコーポレイテッド シリコン化合物によるシリコン含有層の堆積
WO2005076326A1 (ja) * 2004-02-10 2005-08-18 Renesas Technology Corp. 半導体装置の製造方法
WO2005116304A2 (en) * 2004-04-23 2005-12-08 Asm America, Inc. In situ doped epitaxial films
JP2007535147A (ja) * 2004-04-23 2007-11-29 エーエスエム アメリカ インコーポレイテッド インサイチュドープトエピタキシャルフィルム
JP2007537601A (ja) * 2004-05-14 2007-12-20 アプライド　マテリアルズ　インコーポレイテッド 選択的堆積プロセスを使用したｍｏｓｆｅｔデバイスの作製方法

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2014512669A (ja) * 2011-02-23 2014-05-22 インターナショナル・ビジネス・マシーンズ・コーポレーション 低温選択エピタキシー方法
US10011920B2 (en) 2011-02-23 2018-07-03 International Business Machines Corporation Low-temperature selective epitaxial growth of silicon for device integration
JP2025501548A (ja) * 2021-12-20 2025-01-22 エイチピエスピ カンパニー リミテッド ウェハの薄膜に対する炭素ドーピング方法
JP7727115B2 (ja) 2021-12-20 2025-08-20 エイチピエスピ カンパニー リミテッド ウェハの薄膜に対する炭素ドーピング方法

Also Published As

Publication number Publication date
WO2007078802A3 (en) 2008-01-24
KR20080089403A (ko) 2008-10-06
TWI405248B (zh) 2013-08-11
TW200731355A (en) 2007-08-16
US7863163B2 (en) 2011-01-04
US20070161216A1 (en) 2007-07-12
WO2007078802A2 (en) 2007-07-12

Similar Documents

Publication Publication Date Title
US7863163B2 (en) Epitaxial deposition of doped semiconductor materials
JP5173140B2 (ja) 電気的に活性なドープト結晶性Ｓｉ含有膜の堆積方法
US7939447B2 (en) Inhibitors for selective deposition of silicon containing films
US20080026149A1 (en) Methods and systems for selectively depositing si-containing films using chloropolysilanes
KR100870507B1 (ko) 트리실란을 사용한, 혼합 기판상의 증착
US20120024223A1 (en) Thin films and methods of making them using cyclohexasilane
US7029995B2 (en) Methods for depositing amorphous materials and using them as templates for epitaxial films by solid phase epitaxy
CN120072629A (zh) 用于沉积硼掺杂硅锗层的方法及相关组合物
EP1887617A2 (en) Deposition method over mixed substrates using trisilane

Legal Events

Date Code Title Description
RD02 Notification of acceptance of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7422

Effective date: 20090703

RD03 Notification of appointment of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7423

Effective date: 20090703

RD04 Notification of resignation of power of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7424

Effective date: 20091209

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20091214

A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20091214

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20100621

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20120710

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20121204