JP2009128503A - 薄膜トランジスタ回路とその駆動方法、ならびに発光表示装置 - Google Patents
薄膜トランジスタ回路とその駆動方法、ならびに発光表示装置 Download PDFInfo
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- 238000000034 method Methods 0.000 title claims abstract description 25
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- 239000004065 semiconductor Substances 0.000 claims description 7
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- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
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- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
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- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
- H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
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- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
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- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
Abstract
【解決手段】ゲート・ソース間及びゲート・ドレインに印加される電気的ストレスにより閾値電圧が可逆的に変化する薄膜トランジスタを複数並列に接続してなる薄膜トランジスタ回路の駆動方法であって、薄膜トランジスタの閾値電圧の変動が所定の範囲内となるように、複数の薄膜トランジスタTFT11〜TFT13を選択的に切り替える。発光素子と該発光素子の駆動回路で構成される画素を複数備える発光表示装置であって、駆動回路は、各々の画素にゲート・ソース間またはゲート・ドレイン間への電圧の印加により閾値電圧が可逆的に変化する薄膜トランジスタを複数並列に接続してなり、且つ発光素子に電流を供給する薄膜トランジスタの閾値電圧が所定の範囲内となるように、複数の薄膜トランジスタを選択的に切り替える手段を有する。
【選択図】図10
Description
Nomura et. al.,Nature, vol.432,pp.488−492, 2004 Yabuta et. al.,APL, 89, 112123, 2006
前記薄膜トランジスタの閾値電圧の変動が所定の範囲内となるように、前記複数の薄膜トランジスタを選択的に切り替える工程を含むことを特徴とする。
前記薄膜トランジスタの閾値電圧が所定の範囲内となるように、該複数の薄膜トランジスタを選択的に切り替える手段を有することを特徴とする。
該駆動回路は、
各々の画素に、ゲート・ソース間またはゲート・ドレイン間に印加される電気的ストレスにより閾値電圧が可逆的に変化する薄膜トランジスタを複数並列に接続してなり、且つ
該発光素子に電流を供給する薄膜トランジスタの閾値電圧が所定の範囲内となるように、該複数の薄膜トランジスタを選択的に切り替える手段を有することを特徴とする。
はじめに、本実施例に使用するa−IGZOをチャネル層とするTFTの基本特性について述べる。
有機EL素子に電流を供給している期間は、「通電中」であり、必然時に、トランジスタに特性変化をもたらす電気ストレスがかかっている。
次に動作を説明する。ここでは、一画素を取り出しての動作を説明するが、他の画素についても同様である。駆動TFTとしてTFT1からTFT3が用意されていて、この順で駆動と休止状態を繰り返す。
今、有機EL1に電流を供給する駆動TFTとしてTFT2が選択されている。TFT2は、フレーム毎に信号線からのデータをゲート電圧として受け取り、有機EL1を所定の輝度で発光させる。TFT2は表示時間と共に、印加電圧分の電気ストレスが加算され、それに伴って閾値が単調にシフトする。
TFT1 駆動TFT
TFT2,TFT3 スイッチングTFT
VDD 電源線
GND GND線
SLn (n列目の)走査線
DLm (m行目の)データ線
C 容量
10 a−IGZOチャネル層
20 熱酸化シリコンゲート絶縁層
21 スパッタ成膜酸化シリコンゲート絶縁層
30 低抵抗シリコン基板(ゲート電極)
40 Au電極層
50 Ti電極層
60 ガラス基板
70 ポリイミド(PI)
80 ITO(アノード)電極層
90 OLED層
100 Al / CsCO3 ( カソード)電極層
101 シフトレジスタ
102 メモリ
800-834 スイッチ
Claims (20)
- ゲート・ソース間またはゲート・ドレイン間に印加される電気的ストレスにより閾値電圧が可逆的に変化する薄膜トランジスタを複数並列に接続してなる薄膜トランジスタ回路の駆動方法であって、
前記薄膜トランジスタの閾値電圧の変動が所定の範囲内となるように、前記複数の薄膜トランジスタを選択的に切り替える工程を含むことを特徴とする薄膜トランジスタ回路の駆動方法。 - 選択されない前記薄膜トランジスタを、前記電気的ストレスが印加されない休止状態とすることを特徴とする請求項1に記載の薄膜トランジスタ回路の駆動方法。
- 前記休止状態にある薄膜トランジスタのゲート、ソース、及びドレインが、同電位又はフローティング状態に保たれていることを特徴とする請求項2に記載の薄膜トランジスタ回路の駆動方法。
- 前記複数の薄膜トランジスタの切り替えは、ゲート・ソース間及びゲート・ドレイン間へ電圧が印加される時間に基づいて決定されることを特徴とする請求項1から3のいずれか1項に記載の薄膜トランジスタ回路の駆動方法。
- 前記複数の薄膜トランジスタの切り替えは、ゲート・ソース間及びゲート・ドレイン間へ印加される電圧に基づいて決定されることを特徴とする請求項1から3のいずれか1項に記載の薄膜トランジスタ回路の駆動方法。
- 通電状態にある前記薄膜トランジスタについて、ゲート・ソース間及びゲート・ドレイン間に電圧が印加されている時間を記憶し、かつ、休止状態にある薄膜トランジスタについて、休止状態の時間を記憶することを特徴とする請求項4に記載の薄膜トランジスタ回路の駆動方法。
- ゲート・ソース間またはゲート・ドレイン間に印加される電気的ストレスにより閾値電圧が可逆的に変化する薄膜トランジスタを複数並列に接続してなる薄膜トランジスタ回路であって、
前記薄膜トランジスタの閾値電圧が所定の範囲内となるように、該複数の薄膜トランジスタを選択的に切り替える手段を有する薄膜トランジスタ回路。 - 選択されない前記薄膜トランジスタを、前記電気的ストレスが印加されない休止状態とすることを特徴とする請求項7に記載の薄膜トランジスタ回路。
- 前記休止状態にある薄膜トランジスタのゲート、ソース及びドレインが、同電位又はフローティング状態に保たれていることを特徴とする請求項7又は8に記載の薄膜トランジスタ回路。
- 前記薄膜トランジスタの切り替え手段が、ゲート・ソース間及びゲート・ドレイン間へ電圧が印加される時間に基づいて決定されることを特徴とする請求項7から9のいずれか1項に記載の薄膜トランジスタ回路。
- 前記薄膜トランジスタの切り替え手段が、ゲート・ソース間及びゲート・ドレイン間へ印加される電圧に基づいて決定されることを特徴とする請求項7から9のいずれか1項に記載の薄膜トランジスタ回路。
- 通電状態にある前記薄膜トランジスタについて、ゲート・ソース間及びゲート・ドレイン間に電圧が印加されている時間を記憶し、休止状態にある薄膜トランジスタについて、休止状態の時間を記憶する手段を有することを特徴とする請求項10に記載の薄膜トランジスタ回路。
- 発光素子と該発光素子の駆動回路で構成される画素を複数備える発光表示装置であって、
該駆動回路は、
各々の画素に、ゲート・ソース間またはゲート・ドレイン間に印加される電気的ストレスにより閾値電圧が可逆的に変化する薄膜トランジスタを複数並列に接続してなり、且つ
該発光素子に電流を供給する薄膜トランジスタの閾値電圧が所定の範囲内となるように、該複数の薄膜トランジスタを選択的に切り替える手段を有する発光表示装置。 - 選択されない前記薄膜トランジスタを、前記電気的ストレスが印加されない休止状態とすることを特徴とする請求項13に記載の発光表示装置。
- 前記休止状態にある薄膜トランジスタのゲート、ソース及びドレインが、同電位又はフローティング状態に保たれていることを特徴とする請求項13又は14に記載の発光表示装置。
- 前記薄膜トランジスタの切り替えが、ゲート・ソース間及びゲート・ドレイン間へ電圧が印加される時間に基づいて決定される請求項13から15のいずれか1項に記載の発光表示装置。
- 前記薄膜トランジスタの切り替えは、ゲート・ソース間及びゲート・ドレイン間へ印加される電圧に基づいて決定される請求項13から15のいずれか1項に記載の発光表示装置。
- 通電状態にある前記薄膜トランジスタについて、ゲート・ソース間及びゲート・ドレイン間に電圧が印加されている時間を記憶し、かつ休止状態にある薄膜トランジスタについて、休止状態の時間を記憶する装置を備えることを特徴とする請求項16に記載の発光表示装置。
- 前記薄膜トランジスタのチャネル層として、非晶質酸化物半導体を用いることを特徴とする請求項7から12のいずれか1項に記載の薄膜トランジスタ回路。
- 前記薄膜トランジスタのチャネル層として、非晶質酸化物半導体を用いることを特徴とする請求項13から18のいずれか1項に記載の発光表示装置。
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JP2007301782A JP2009128503A (ja) | 2007-11-21 | 2007-11-21 | 薄膜トランジスタ回路とその駆動方法、ならびに発光表示装置 |
EP08852789A EP2195806A1 (en) | 2007-11-21 | 2008-11-11 | Thin-film transistor circuit, driving method thereof, and light-emitting display apparatus |
KR1020107012858A KR101138272B1 (ko) | 2007-11-21 | 2008-11-11 | 박막트랜지스터 회로, 그 구동방법, 및 발광 표시장치 |
US12/679,682 US20100194450A1 (en) | 2007-11-21 | 2008-11-11 | Thin-film transistor circuit, driving method thereof, and light-emitting display apparatus |
CN200880116671A CN101861615A (zh) | 2007-11-21 | 2008-11-11 | 薄膜晶体管电路、其驱动方法和发光显示装置 |
PCT/JP2008/070831 WO2009066627A1 (en) | 2007-11-21 | 2008-11-11 | Thin-film transistor circuit, driving method thereof, and light-emitting display apparatus |
TW097144515A TW200947388A (en) | 2007-11-21 | 2008-11-18 | Thin-film transistor circuit, driving method thereof, and light-emitting display apparatus |
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JP2012078817A (ja) * | 2010-09-10 | 2012-04-19 | Semiconductor Energy Lab Co Ltd | 表示装置 |
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JP2018163356A (ja) * | 2009-10-21 | 2018-10-18 | 株式会社半導体エネルギー研究所 | 表示装置 |
KR20180131706A (ko) * | 2017-05-31 | 2018-12-11 | 엘지디스플레이 주식회사 | 전계 발광 표시장치 |
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KR101839931B1 (ko) | 2009-11-30 | 2018-03-19 | 가부시키가이샤 한도오따이 에네루기 켄큐쇼 | 액정 표시 장치, 액정 표시 장치의 구동 방법, 및 이 액정 표시 장치를 구비하는 전자기기 |
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KR101138272B1 (ko) | 2012-04-24 |
WO2009066627A1 (en) | 2009-05-28 |
US20100194450A1 (en) | 2010-08-05 |
EP2195806A1 (en) | 2010-06-16 |
KR20100087033A (ko) | 2010-08-02 |
CN101861615A (zh) | 2010-10-13 |
TW200947388A (en) | 2009-11-16 |
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