JP2008527743A - Ｃｍｏｓデバイスの自己形成金属シリサイド化ゲート - Google Patents

Ｃｍｏｓデバイスの自己形成金属シリサイド化ゲート Download PDF

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Publication number
JP2008527743A
JP2008527743A JP2007551329A JP2007551329A JP2008527743A JP 2008527743 A JP2008527743 A JP 2008527743A JP 2007551329 A JP2007551329 A JP 2007551329A JP 2007551329 A JP2007551329 A JP 2007551329A JP 2008527743 A JP2008527743 A JP 2008527743A
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JP
Japan
Prior art keywords
layer
silicon material
high temperature
silicide
temperature process
Prior art date
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Pending
Application number
JP2007551329A
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English (en)
Japanese (ja)
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JP2008527743A5 (enExample
Inventor
ルオ、ジーチオン
ファン、スンフェイ
チュー、ホイロン
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
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International Business Machines Corp
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Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JP2008527743A publication Critical patent/JP2008527743A/ja
Publication of JP2008527743A5 publication Critical patent/JP2008527743A5/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/66—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes
    • H10D64/667—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers
    • H10D64/668—Electrodes having a conductor capacitively coupled to a semiconductor by an insulator, e.g. MIS electrodes the conductor comprising a layer of alloy material, compound material or organic material contacting the insulator, e.g. TiN workfunction layers the layer being a silicide, e.g. TiSi2
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H01L21/28008—Making conductor-insulator-semiconductor electrodes
    • H01L21/28017—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon
    • H01L21/28026—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor
    • H01L21/28097—Making conductor-insulator-semiconductor electrodes the insulator being formed after the semiconductor body, the semiconductor being silicon characterised by the conductor the final conductor layer next to the insulator being a metallic silicide
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/01—Manufacture or treatment
    • H10D30/021—Manufacture or treatment of FETs having insulated gates [IGFET]
    • H10D30/0212—Manufacture or treatment of FETs having insulated gates [IGFET] using self-aligned silicidation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/601—Insulated-gate field-effect transistors [IGFET] having lightly-doped drain or source extensions, e.g. LDD IGFETs or DDD IGFETs 
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/0123—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs
    • H10D84/0126—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs
    • H10D84/0165—Integrating together multiple components covered by H10D12/00 or H10D30/00, e.g. integrating multiple IGBTs the components including insulated gates, e.g. IGFETs the components including complementary IGFETs, e.g. CMOS devices
    • H10D84/0172—Manufacturing their gate conductors
    • H10D84/0174—Manufacturing their gate conductors the gate conductors being silicided
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D84/00—Integrated devices formed in or on semiconductor substrates that comprise only semiconducting layers, e.g. on Si wafers or on GaAs-on-Si wafers
    • H10D84/01—Manufacture or treatment
    • H10D84/02—Manufacture or treatment characterised by using material-based technologies
    • H10D84/03—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology
    • H10D84/038—Manufacture or treatment characterised by using material-based technologies using Group IV technology, e.g. silicon technology or silicon-carbide [SiC] technology using silicon technology, e.g. SiGe

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Insulated Gate Type Field-Effect Transistor (AREA)
  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
  • Thin Film Transistor (AREA)
JP2007551329A 2005-01-13 2006-01-10 Ｃｍｏｓデバイスの自己形成金属シリサイド化ゲート Pending JP2008527743A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/905,629 US7105440B2 (en) 2005-01-13 2005-01-13 Self-forming metal silicide gate for CMOS devices
PCT/US2006/000838 WO2006076373A1 (en) 2005-01-13 2006-01-10 Self-forming metal silicide gate for cmos devices

Publications (2)

Publication Number Publication Date
JP2008527743A true JP2008527743A (ja) 2008-07-24
JP2008527743A5 JP2008527743A5 (enExample) 2008-12-04

Family

ID=36653783

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2007551329A Pending JP2008527743A (ja) 2005-01-13 2006-01-10 Ｃｍｏｓデバイスの自己形成金属シリサイド化ゲート

Country Status (7)

Country Link
US (1) US7105440B2 (enExample)
EP (1) EP1856725A4 (enExample)
JP (1) JP2008527743A (enExample)
KR (1) KR20070095933A (enExample)
CN (1) CN100505187C (enExample)
TW (1) TW200636920A (enExample)
WO (1) WO2006076373A1 (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007080955A (ja) * 2005-09-12 2007-03-29 Nec Corp 半導体装置及びその製造方法

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7687396B2 (en) * 2006-12-29 2010-03-30 Texas Instruments Incorporated Method of forming silicided gates using buried metal layers
KR100852212B1 (ko) 2007-06-12 2008-08-13 삼성전자주식회사 반도체 소자 및 이를 형성하는 방법
US7615831B2 (en) * 2007-10-26 2009-11-10 International Business Machines Corporation Structure and method for fabricating self-aligned metal contacts
US7964923B2 (en) 2008-01-07 2011-06-21 International Business Machines Corporation Structure and method of creating entirely self-aligned metallic contacts
US8765603B2 (en) * 2011-08-01 2014-07-01 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming a buffer layer
US9165826B2 (en) 2011-08-01 2015-10-20 Taiwan Semiconductor Manufacturing Company, Ltd. Method of forming a semiconductor device comprising titanium silicon oxynitride

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06244136A (ja) * 1992-12-25 1994-09-02 Hitachi Ltd 半導体装置及びその製造方法
JPH1117182A (ja) * 1997-06-26 1999-01-22 Sony Corp 半導体装置およびその製造方法
JPH11135789A (ja) * 1997-10-31 1999-05-21 Nippon Steel Corp 半導体装置およびその製造方法
JP2000252462A (ja) * 1999-03-01 2000-09-14 Toshiba Corp Ｍｉｓ型半導体装置及びその製造方法

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR950003233B1 (ko) * 1992-05-30 1995-04-06 삼성전자 주식회사 이중층 실리사이드 구조를 갖는 반도체 장치 및 그 제조방법
US5444302A (en) * 1992-12-25 1995-08-22 Hitachi, Ltd. Semiconductor device including multi-layer conductive thin film of polycrystalline material
CN1222754A (zh) * 1997-12-19 1999-07-14 西门子公司 在硅化物膜上进行化学汽相淀积的方法和设备
US6562718B1 (en) * 2000-12-06 2003-05-13 Advanced Micro Devices, Inc. Process for forming fully silicided gates
US6555453B1 (en) * 2001-01-31 2003-04-29 Advanced Micro Devices, Inc. Fully nickel silicided metal gate with shallow junction formed
US6878623B2 (en) * 2001-02-01 2005-04-12 Chartered Semiconductor Manufacturing Ltd. Technique to achieve thick silicide film for ultra-shallow junctions
US7029966B2 (en) * 2003-09-18 2006-04-18 International Business Machines Corporation Process options of forming silicided metal gates for advanced CMOS devices

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH06244136A (ja) * 1992-12-25 1994-09-02 Hitachi Ltd 半導体装置及びその製造方法
JPH1117182A (ja) * 1997-06-26 1999-01-22 Sony Corp 半導体装置およびその製造方法
JPH11135789A (ja) * 1997-10-31 1999-05-21 Nippon Steel Corp 半導体装置およびその製造方法
JP2000252462A (ja) * 1999-03-01 2000-09-14 Toshiba Corp Ｍｉｓ型半導体装置及びその製造方法

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007080955A (ja) * 2005-09-12 2007-03-29 Nec Corp 半導体装置及びその製造方法

Also Published As

Publication number Publication date
EP1856725A1 (en) 2007-11-21
CN100505187C (zh) 2009-06-24
CN101080811A (zh) 2007-11-28
EP1856725A4 (en) 2009-01-14
US20060154413A1 (en) 2006-07-13
WO2006076373A1 (en) 2006-07-20
TW200636920A (en) 2006-10-16
US7105440B2 (en) 2006-09-12
KR20070095933A (ko) 2007-10-01

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