JP2008103028A5 - - Google Patents
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- Publication number
- JP2008103028A5 JP2008103028A5 JP2006285015A JP2006285015A JP2008103028A5 JP 2008103028 A5 JP2008103028 A5 JP 2008103028A5 JP 2006285015 A JP2006285015 A JP 2006285015A JP 2006285015 A JP2006285015 A JP 2006285015A JP 2008103028 A5 JP2008103028 A5 JP 2008103028A5
- Authority
- JP
- Japan
- Prior art keywords
- storage node
- transistor
- semiconductor memory
- memory device
- node
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Withdrawn
Links
- 239000004065 semiconductor Substances 0.000 claims 37
- 230000000295 complement effect Effects 0.000 claims 4
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2006285015A JP2008103028A (ja) | 2006-10-19 | 2006-10-19 | 半導体記憶装置 |
| US11/826,246 US7589991B2 (en) | 2006-10-19 | 2007-07-13 | Semiconductor memory device |
| CNA2007101419953A CN101165806A (zh) | 2006-10-19 | 2007-08-17 | 半导体存储器件 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2006285015A JP2008103028A (ja) | 2006-10-19 | 2006-10-19 | 半導体記憶装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2008103028A JP2008103028A (ja) | 2008-05-01 |
| JP2008103028A5 true JP2008103028A5 (enExample) | 2009-11-12 |
Family
ID=39317727
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2006285015A Withdrawn JP2008103028A (ja) | 2006-10-19 | 2006-10-19 | 半導体記憶装置 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US7589991B2 (enExample) |
| JP (1) | JP2008103028A (enExample) |
| CN (1) | CN101165806A (enExample) |
Families Citing this family (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4353393B2 (ja) | 2001-06-05 | 2009-10-28 | 株式会社ルネサステクノロジ | 半導体集積回路装置 |
| US7619947B2 (en) * | 2007-10-31 | 2009-11-17 | Texas Instruments Incorporated | Integrated circuit having a supply voltage controller capable of floating a variable supply voltage |
| JP5417952B2 (ja) * | 2009-04-08 | 2014-02-19 | 富士通セミコンダクター株式会社 | 半導体メモリおよびシステム |
| CN101877243B (zh) * | 2010-04-22 | 2015-09-30 | 上海华虹宏力半导体制造有限公司 | 静态随机存取存储器 |
| CN101819815B (zh) * | 2010-04-29 | 2015-05-20 | 上海华虹宏力半导体制造有限公司 | 一种消除读取干扰的静态随机存储器 |
| JP2011248932A (ja) | 2010-05-21 | 2011-12-08 | Panasonic Corp | 半導体記憶装置 |
| US8462542B2 (en) * | 2010-06-24 | 2013-06-11 | Texas Instruments Incorporated | Bit-by-bit write assist for solid-state memory |
| US8305798B2 (en) * | 2010-07-13 | 2012-11-06 | Texas Instruments Incorporated | Memory cell with equalization write assist in solid-state memory |
| CN103137187B (zh) * | 2011-11-28 | 2015-12-09 | 上海华虹宏力半导体制造有限公司 | 一种sram的旁路结构 |
| KR20140092537A (ko) * | 2013-01-16 | 2014-07-24 | 삼성전자주식회사 | 메모리 셀 및 이를 포함하는 메모리 장치 |
| JP5641116B2 (ja) * | 2013-09-18 | 2014-12-17 | 富士通セミコンダクター株式会社 | 半導体メモリおよびシステム |
| US9928886B2 (en) * | 2016-06-23 | 2018-03-27 | Chih-Cheng Hsiao | Low power memory device |
| JP6984166B2 (ja) * | 2017-05-16 | 2021-12-17 | 富士通株式会社 | 記憶回路及び記憶回路の制御方法 |
| KR102755896B1 (ko) * | 2023-04-14 | 2025-01-21 | 서울대학교산학협력단 | 랜덤 액세스 메모리 및 그 제조 방법 |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN1202530C (zh) * | 1998-04-01 | 2005-05-18 | 三菱电机株式会社 | 在低电源电压下高速动作的静态型半导体存储装置 |
| JP2001143476A (ja) | 1999-11-15 | 2001-05-25 | Mitsubishi Electric Corp | スタティック型半導体記憶装置 |
| JP2002042476A (ja) | 2000-07-25 | 2002-02-08 | Mitsubishi Electric Corp | スタティック型半導体記憶装置 |
| US6618289B2 (en) | 2001-10-29 | 2003-09-09 | Atmel Corporation | High voltage bit/column latch for Vcc operation |
| US20030190771A1 (en) * | 2002-03-07 | 2003-10-09 | 02Ic, Ltd. | Integrated ram and non-volatile memory cell method and structure |
| JP4162076B2 (ja) | 2002-05-30 | 2008-10-08 | 株式会社ルネサステクノロジ | 半導体記憶装置 |
| JP2004055099A (ja) * | 2002-07-24 | 2004-02-19 | Renesas Technology Corp | 差動増幅回路およびそれを用いた半導体記憶装置 |
| US6992916B2 (en) * | 2003-06-13 | 2006-01-31 | Taiwan Semiconductor Manufacturing Co., Ltd. | SRAM cell design with high resistor CMOS gate structure for soft error rate improvement |
| JP2006012968A (ja) * | 2004-06-23 | 2006-01-12 | Nec Electronics Corp | 半導体集積回路装置及びその設計方法 |
| US7161827B2 (en) * | 2005-01-12 | 2007-01-09 | Freescale Semiconductor, Inc. | SRAM having improved cell stability and method therefor |
| US7164596B1 (en) | 2005-07-28 | 2007-01-16 | Texas Instruments Incorporated | SRAM cell with column select line |
| US7289354B2 (en) * | 2005-07-28 | 2007-10-30 | Texas Instruments Incorporated | Memory array with a delayed wordline boost |
-
2006
- 2006-10-19 JP JP2006285015A patent/JP2008103028A/ja not_active Withdrawn
-
2007
- 2007-07-13 US US11/826,246 patent/US7589991B2/en not_active Expired - Fee Related
- 2007-08-17 CN CNA2007101419953A patent/CN101165806A/zh active Pending