JP2007513523A5 - - Google Patents
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- JP2007513523A5 JP2007513523A5 JP2006542677A JP2006542677A JP2007513523A5 JP 2007513523 A5 JP2007513523 A5 JP 2007513523A5 JP 2006542677 A JP2006542677 A JP 2006542677A JP 2006542677 A JP2006542677 A JP 2006542677A JP 2007513523 A5 JP2007513523 A5 JP 2007513523A5
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor layer
- trenches
- type
- adjacent
- region
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims 79
- 239000012535 impurity Substances 0.000 claims 36
- 238000000034 method Methods 0.000 claims 32
- 238000000151 deposition Methods 0.000 claims 20
- 239000012212 insulator Substances 0.000 claims 19
- 210000000746 body region Anatomy 0.000 claims 13
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims 9
- 229910052698 phosphorus Inorganic materials 0.000 claims 9
- 239000011574 phosphorus Substances 0.000 claims 9
- 238000005530 etching Methods 0.000 claims 8
- 230000005669 field effect Effects 0.000 claims 6
- 239000000758 substrate Substances 0.000 claims 6
- ZOXJGFHDIHLPTG-UHFFFAOYSA-N Boron Chemical compound [B] ZOXJGFHDIHLPTG-UHFFFAOYSA-N 0.000 claims 5
- 229910052796 boron Inorganic materials 0.000 claims 5
- 238000004519 manufacturing process Methods 0.000 claims 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims 2
- 238000005229 chemical vapour deposition Methods 0.000 claims 2
- 238000002347 injection Methods 0.000 claims 2
- 239000007924 injection Substances 0.000 claims 2
- 239000000463 material Substances 0.000 claims 2
- 230000001590 oxidative effect Effects 0.000 claims 2
- 239000002245 particle Substances 0.000 claims 2
- 229910052710 silicon Inorganic materials 0.000 claims 2
- 239000010703 silicon Substances 0.000 claims 2
- 230000015556 catabolic process Effects 0.000 claims 1
- 230000008021 deposition Effects 0.000 claims 1
- 238000002513 implantation Methods 0.000 claims 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims 1
- 229920005591 polysilicon Polymers 0.000 claims 1
- 238000000926 separation method Methods 0.000 claims 1
Applications Claiming Priority (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US10/726,922 US7279743B2 (en) | 2003-12-02 | 2003-12-02 | Closed cell trench metal-oxide-semiconductor field effect transistor |
| PCT/US2004/040063 WO2005057615A2 (en) | 2003-12-02 | 2004-11-30 | Closed cell trench metal-oxide-semiconductor field effect transistor |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2007513523A JP2007513523A (ja) | 2007-05-24 |
| JP2007513523A5 true JP2007513523A5 (https=) | 2011-04-21 |
Family
ID=34620544
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2006542677A Pending JP2007513523A (ja) | 2003-12-02 | 2004-11-30 | クローズドセルトレンチmos電界効果トランジスタ |
Country Status (5)
| Country | Link |
|---|---|
| US (3) | US7279743B2 (https=) |
| JP (1) | JP2007513523A (https=) |
| DE (1) | DE112004002310B4 (https=) |
| TW (1) | TWI366249B (https=) |
| WO (1) | WO2005057615A2 (https=) |
Families Citing this family (72)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US8183629B2 (en) * | 2004-05-13 | 2012-05-22 | Vishay-Siliconix | Stacked trench metal-oxide-semiconductor field effect transistor device |
| US7608888B1 (en) * | 2004-06-10 | 2009-10-27 | Qspeed Semiconductor Inc. | Field effect transistor |
| US7265415B2 (en) * | 2004-10-08 | 2007-09-04 | Fairchild Semiconductor Corporation | MOS-gated transistor with reduced miller capacitance |
| US20070238251A1 (en) * | 2006-04-05 | 2007-10-11 | M-Mos Semiconductor Sdn. Bhd. | Method of forming sub-100nm narrow trenches in semiconductor substrates |
| US8471390B2 (en) | 2006-05-12 | 2013-06-25 | Vishay-Siliconix | Power MOSFET contact metallization |
| JP2008066708A (ja) * | 2006-08-09 | 2008-03-21 | Toshiba Corp | 半導体装置 |
| US8368126B2 (en) | 2007-04-19 | 2013-02-05 | Vishay-Siliconix | Trench metal oxide semiconductor with recessed trench material and remote contacts |
| US10600902B2 (en) * | 2008-02-13 | 2020-03-24 | Vishay SIliconix, LLC | Self-repairing field effect transisitor |
| US8421162B2 (en) | 2009-09-30 | 2013-04-16 | Suvolta, Inc. | Advanced transistors with punch through suppression |
| US8273617B2 (en) | 2009-09-30 | 2012-09-25 | Suvolta, Inc. | Electronic devices and systems, and methods for making and using the same |
| US10026835B2 (en) | 2009-10-28 | 2018-07-17 | Vishay-Siliconix | Field boosted metal-oxide-semiconductor field effect transistor |
| US9306056B2 (en) * | 2009-10-30 | 2016-04-05 | Vishay-Siliconix | Semiconductor device with trench-like feed-throughs |
| US8604525B2 (en) | 2009-11-02 | 2013-12-10 | Vishay-Siliconix | Transistor structure with feed-through source-to-substrate contact |
| US8530286B2 (en) | 2010-04-12 | 2013-09-10 | Suvolta, Inc. | Low power semiconductor transistor structure and method of fabrication thereof |
| JP5531787B2 (ja) * | 2010-05-31 | 2014-06-25 | 株式会社デンソー | 炭化珪素半導体装置およびその製造方法 |
| US8569128B2 (en) | 2010-06-21 | 2013-10-29 | Suvolta, Inc. | Semiconductor structure and method of fabrication thereof with mixed metal types |
| US8377783B2 (en) | 2010-09-30 | 2013-02-19 | Suvolta, Inc. | Method for reducing punch-through in a transistor device |
| US8404551B2 (en) | 2010-12-03 | 2013-03-26 | Suvolta, Inc. | Source/drain extension control for advanced transistors |
| JP5498431B2 (ja) * | 2011-02-02 | 2014-05-21 | ローム株式会社 | 半導体装置およびその製造方法 |
| US8461875B1 (en) | 2011-02-18 | 2013-06-11 | Suvolta, Inc. | Digital circuits having improved transistors, and methods therefor |
| US8525271B2 (en) | 2011-03-03 | 2013-09-03 | Suvolta, Inc. | Semiconductor structure with improved channel stack and method for fabrication thereof |
| US8400219B2 (en) | 2011-03-24 | 2013-03-19 | Suvolta, Inc. | Analog circuits having improved transistors, and methods therefor |
| US8748270B1 (en) | 2011-03-30 | 2014-06-10 | Suvolta, Inc. | Process for manufacturing an improved analog transistor |
| US8796048B1 (en) | 2011-05-11 | 2014-08-05 | Suvolta, Inc. | Monitoring and measurement of thin film layers |
| US8999861B1 (en) | 2011-05-11 | 2015-04-07 | Suvolta, Inc. | Semiconductor structure with substitutional boron and method for fabrication thereof |
| US8811068B1 (en) | 2011-05-13 | 2014-08-19 | Suvolta, Inc. | Integrated circuit devices and methods |
| US8569156B1 (en) | 2011-05-16 | 2013-10-29 | Suvolta, Inc. | Reducing or eliminating pre-amorphization in transistor manufacture |
| US8735987B1 (en) | 2011-06-06 | 2014-05-27 | Suvolta, Inc. | CMOS gate stack structures and processes |
| US8995204B2 (en) | 2011-06-23 | 2015-03-31 | Suvolta, Inc. | Circuit devices and methods having adjustable transistor body bias |
| US8629016B1 (en) | 2011-07-26 | 2014-01-14 | Suvolta, Inc. | Multiple transistor types formed in a common epitaxial layer by differential out-diffusion from a doped underlayer |
| US8748986B1 (en) | 2011-08-05 | 2014-06-10 | Suvolta, Inc. | Electronic device with controlled threshold voltage |
| KR101891373B1 (ko) | 2011-08-05 | 2018-08-24 | 엠아이이 후지쯔 세미컨덕터 리미티드 | 핀 구조물을 갖는 반도체 디바이스 및 그 제조 방법 |
| US8614128B1 (en) | 2011-08-23 | 2013-12-24 | Suvolta, Inc. | CMOS structures and processes based on selective thinning |
| US8645878B1 (en) | 2011-08-23 | 2014-02-04 | Suvolta, Inc. | Porting a circuit design from a first semiconductor process to a second semiconductor process |
| US8713511B1 (en) | 2011-09-16 | 2014-04-29 | Suvolta, Inc. | Tools and methods for yield-aware semiconductor manufacturing process target generation |
| US9236466B1 (en) | 2011-10-07 | 2016-01-12 | Mie Fujitsu Semiconductor Limited | Analog circuits having improved insulated gate transistors, and methods therefor |
| US8895327B1 (en) | 2011-12-09 | 2014-11-25 | Suvolta, Inc. | Tipless transistors, short-tip transistors, and methods and circuits therefor |
| US8819603B1 (en) | 2011-12-15 | 2014-08-26 | Suvolta, Inc. | Memory circuits and methods of making and designing the same |
| US8883600B1 (en) | 2011-12-22 | 2014-11-11 | Suvolta, Inc. | Transistor having reduced junction leakage and methods of forming thereof |
| US8599623B1 (en) | 2011-12-23 | 2013-12-03 | Suvolta, Inc. | Circuits and methods for measuring circuit elements in an integrated circuit device |
| US8970289B1 (en) | 2012-01-23 | 2015-03-03 | Suvolta, Inc. | Circuits and devices for generating bi-directional body bias voltages, and methods therefor |
| US8877619B1 (en) | 2012-01-23 | 2014-11-04 | Suvolta, Inc. | Process for manufacture of integrated circuits with different channel doping transistor architectures and devices therefrom |
| US9093550B1 (en) | 2012-01-31 | 2015-07-28 | Mie Fujitsu Semiconductor Limited | Integrated circuits having a plurality of high-K metal gate FETs with various combinations of channel foundation structure and gate stack structure and methods of making same |
| US9406567B1 (en) | 2012-02-28 | 2016-08-02 | Mie Fujitsu Semiconductor Limited | Method for fabricating multiple transistor devices on a substrate with varying threshold voltages |
| US8863064B1 (en) | 2012-03-23 | 2014-10-14 | Suvolta, Inc. | SRAM cell layout structure and devices therefrom |
| US9299698B2 (en) | 2012-06-27 | 2016-03-29 | Mie Fujitsu Semiconductor Limited | Semiconductor structure with multiple transistors having various threshold voltages |
| US8637955B1 (en) | 2012-08-31 | 2014-01-28 | Suvolta, Inc. | Semiconductor structure with reduced junction leakage and method of fabrication thereof |
| US9112057B1 (en) | 2012-09-18 | 2015-08-18 | Mie Fujitsu Semiconductor Limited | Semiconductor devices with dopant migration suppression and method of fabrication thereof |
| US9041126B2 (en) | 2012-09-21 | 2015-05-26 | Mie Fujitsu Semiconductor Limited | Deeply depleted MOS transistors having a screening layer and methods thereof |
| US9954072B2 (en) | 2012-10-18 | 2018-04-24 | Mitsubishi Electric Corporation | Silicon-carbide semiconductor device and manufacturing method thereof |
| WO2014071049A2 (en) | 2012-10-31 | 2014-05-08 | Suvolta, Inc. | Dram-type device with low variation transistor peripheral circuits, and related methods |
| US8816754B1 (en) | 2012-11-02 | 2014-08-26 | Suvolta, Inc. | Body bias circuits and methods |
| US9093997B1 (en) | 2012-11-15 | 2015-07-28 | Mie Fujitsu Semiconductor Limited | Slew based process and bias monitors and related methods |
| US9070477B1 (en) | 2012-12-12 | 2015-06-30 | Mie Fujitsu Semiconductor Limited | Bit interleaved low voltage static random access memory (SRAM) and related methods |
| US9112484B1 (en) | 2012-12-20 | 2015-08-18 | Mie Fujitsu Semiconductor Limited | Integrated circuit process and bias monitors and related methods |
| JP6177812B2 (ja) | 2013-02-05 | 2017-08-09 | 三菱電機株式会社 | 絶縁ゲート型炭化珪素半導体装置及びその製造方法 |
| US9268885B1 (en) | 2013-02-28 | 2016-02-23 | Mie Fujitsu Semiconductor Limited | Integrated circuit device methods and models with predicted device metric variations |
| US8994415B1 (en) | 2013-03-01 | 2015-03-31 | Suvolta, Inc. | Multiple VDD clock buffer |
| US8988153B1 (en) | 2013-03-09 | 2015-03-24 | Suvolta, Inc. | Ring oscillator with NMOS or PMOS variation insensitivity |
| US9299801B1 (en) | 2013-03-14 | 2016-03-29 | Mie Fujitsu Semiconductor Limited | Method for fabricating a transistor device with a tuned dopant profile |
| US9112495B1 (en) | 2013-03-15 | 2015-08-18 | Mie Fujitsu Semiconductor Limited | Integrated circuit device body bias circuits and methods |
| US9449967B1 (en) | 2013-03-15 | 2016-09-20 | Fujitsu Semiconductor Limited | Transistor array structure |
| US9478571B1 (en) | 2013-05-24 | 2016-10-25 | Mie Fujitsu Semiconductor Limited | Buried channel deeply depleted channel transistor |
| JP6135364B2 (ja) * | 2013-07-26 | 2017-05-31 | 住友電気工業株式会社 | 炭化珪素半導体装置およびその製造方法 |
| US8976575B1 (en) | 2013-08-29 | 2015-03-10 | Suvolta, Inc. | SRAM performance monitor |
| CN103871900A (zh) * | 2014-03-06 | 2014-06-18 | 上海华虹宏力半导体制造有限公司 | 沟槽场效应晶体管及其形成方法 |
| US9710006B2 (en) | 2014-07-25 | 2017-07-18 | Mie Fujitsu Semiconductor Limited | Power up body bias circuits and methods |
| US9319013B2 (en) | 2014-08-19 | 2016-04-19 | Mie Fujitsu Semiconductor Limited | Operational amplifier input offset correction with transistor threshold voltage adjustment |
| US9425304B2 (en) | 2014-08-21 | 2016-08-23 | Vishay-Siliconix | Transistor structure with improved unclamped inductive switching immunity |
| CN106298924A (zh) * | 2015-06-03 | 2017-01-04 | 北大方正集团有限公司 | 场效应晶体管的制备方法和场效应晶体管 |
| JP7182850B2 (ja) * | 2016-11-16 | 2022-12-05 | 富士電機株式会社 | 炭化珪素半導体装置および炭化珪素半導体装置の製造方法 |
| US10658351B2 (en) * | 2017-08-22 | 2020-05-19 | Semiconductor Components Industries, Llc | Electronic device including a transistor having structures with different characteristics |
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| US6906380B1 (en) | 2004-05-13 | 2005-06-14 | Vishay-Siliconix | Drain side gate trench metal-oxide-semiconductor field effect transistor |
| JP2006012967A (ja) | 2004-06-23 | 2006-01-12 | Toshiba Corp | 半導体装置 |
-
2003
- 2003-12-02 US US10/726,922 patent/US7279743B2/en not_active Expired - Fee Related
-
2004
- 2004-11-30 DE DE112004002310.6T patent/DE112004002310B4/de not_active Expired - Fee Related
- 2004-11-30 JP JP2006542677A patent/JP2007513523A/ja active Pending
- 2004-11-30 WO PCT/US2004/040063 patent/WO2005057615A2/en not_active Ceased
- 2004-12-01 TW TW093137023A patent/TWI366249B/zh not_active IP Right Cessation
-
2005
- 2005-01-20 US US11/040,129 patent/US7361558B2/en not_active Expired - Fee Related
-
2008
- 2008-04-22 US US12/107,738 patent/US7833863B1/en not_active Expired - Fee Related
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