JP2007300173A - 電子デバイス用パッケージ、及び電子デバイス - Google Patents

電子デバイス用パッケージ、及び電子デバイス Download PDF

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Publication number
JP2007300173A
JP2007300173A JP2006123958A JP2006123958A JP2007300173A JP 2007300173 A JP2007300173 A JP 2007300173A JP 2006123958 A JP2006123958 A JP 2006123958A JP 2006123958 A JP2006123958 A JP 2006123958A JP 2007300173 A JP2007300173 A JP 2007300173A
Authority
JP
Japan
Prior art keywords
package
electronic device
lid
wiring pattern
recess
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2006123958A
Other languages
English (en)
Japanese (ja)
Other versions
JP2007300173A5 (enExample
Inventor
Masao Nomura
昌生 野村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Miyazaki Epson Corp
Original Assignee
Epson Toyocom Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Epson Toyocom Corp filed Critical Epson Toyocom Corp
Priority to JP2006123958A priority Critical patent/JP2007300173A/ja
Publication of JP2007300173A publication Critical patent/JP2007300173A/ja
Publication of JP2007300173A5 publication Critical patent/JP2007300173A5/ja
Pending legal-status Critical Current

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Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73265—Layer and wire connectors

Landscapes

  • Oscillators With Electromechanical Resonators (AREA)
  • Piezo-Electric Or Mechanical Vibrators, Or Delay Or Filter Circuits (AREA)
JP2006123958A 2006-04-27 2006-04-27 電子デバイス用パッケージ、及び電子デバイス Pending JP2007300173A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2006123958A JP2007300173A (ja) 2006-04-27 2006-04-27 電子デバイス用パッケージ、及び電子デバイス

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006123958A JP2007300173A (ja) 2006-04-27 2006-04-27 電子デバイス用パッケージ、及び電子デバイス

Publications (2)

Publication Number Publication Date
JP2007300173A true JP2007300173A (ja) 2007-11-15
JP2007300173A5 JP2007300173A5 (enExample) 2009-06-18

Family

ID=38769330

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006123958A Pending JP2007300173A (ja) 2006-04-27 2006-04-27 電子デバイス用パッケージ、及び電子デバイス

Country Status (1)

Country Link
JP (1) JP2007300173A (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009177543A (ja) * 2008-01-25 2009-08-06 Daishinku Corp 表面実装型圧電発振器
JP2012109832A (ja) * 2010-11-18 2012-06-07 Nippon Dempa Kogyo Co Ltd 圧電発振器

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11145728A (ja) * 1997-11-04 1999-05-28 Nec Corp 圧電振動子発振器
JPH11195720A (ja) * 1998-01-06 1999-07-21 Nec Corp 半導体装置
WO2001033631A1 (fr) * 1999-10-29 2001-05-10 Nikko Company Boitier pour dispositif haute frequence
JP2003188514A (ja) * 2001-12-21 2003-07-04 Murata Mfg Co Ltd 混載型電子回路装置の製造方法

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11145728A (ja) * 1997-11-04 1999-05-28 Nec Corp 圧電振動子発振器
JPH11195720A (ja) * 1998-01-06 1999-07-21 Nec Corp 半導体装置
WO2001033631A1 (fr) * 1999-10-29 2001-05-10 Nikko Company Boitier pour dispositif haute frequence
JP2003188514A (ja) * 2001-12-21 2003-07-04 Murata Mfg Co Ltd 混載型電子回路装置の製造方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009177543A (ja) * 2008-01-25 2009-08-06 Daishinku Corp 表面実装型圧電発振器
JP2012109832A (ja) * 2010-11-18 2012-06-07 Nippon Dempa Kogyo Co Ltd 圧電発振器

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