JP2007150154A5 - - Google Patents
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- Publication number
- JP2007150154A5 JP2007150154A5 JP2005345410A JP2005345410A JP2007150154A5 JP 2007150154 A5 JP2007150154 A5 JP 2007150154A5 JP 2005345410 A JP2005345410 A JP 2005345410A JP 2005345410 A JP2005345410 A JP 2005345410A JP 2007150154 A5 JP2007150154 A5 JP 2007150154A5
- Authority
- JP
- Japan
- Prior art keywords
- semiconductor chip
- wiring
- disposed
- semiconductor device
- base substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000004065 semiconductor Substances 0.000 claims 44
- 239000000758 substrate Substances 0.000 claims 13
- 239000011347 resin Substances 0.000 claims 10
- 229920005989 resin Polymers 0.000 claims 10
- 238000007789 sealing Methods 0.000 claims 2
- 239000000463 material Substances 0.000 claims 1
- 230000001360 synchronised effect Effects 0.000 claims 1
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2005345410A JP5016811B2 (ja) | 2005-11-30 | 2005-11-30 | 半導体装置 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2005345410A JP5016811B2 (ja) | 2005-11-30 | 2005-11-30 | 半導体装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2007150154A JP2007150154A (ja) | 2007-06-14 |
| JP2007150154A5 true JP2007150154A5 (enExample) | 2009-01-22 |
| JP5016811B2 JP5016811B2 (ja) | 2012-09-05 |
Family
ID=38211157
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2005345410A Expired - Fee Related JP5016811B2 (ja) | 2005-11-30 | 2005-11-30 | 半導体装置 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP5016811B2 (enExample) |
Families Citing this family (13)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4571679B2 (ja) * | 2008-01-18 | 2010-10-27 | Okiセミコンダクタ株式会社 | 半導体装置 |
| US8766440B2 (en) | 2010-03-04 | 2014-07-01 | Nec Corporation | Wiring board with built-in semiconductor element |
| WO2011125380A1 (ja) | 2010-04-08 | 2011-10-13 | 日本電気株式会社 | 半導体素子内蔵配線基板 |
| KR101145041B1 (ko) * | 2010-10-19 | 2012-05-11 | 주식회사 네패스 | 반도체칩 패키지, 반도체 모듈 및 그 제조 방법 |
| KR102205195B1 (ko) * | 2018-01-23 | 2021-01-20 | 주식회사 네패스 | 반도체 칩 적층 패키지 및 그 제조 방법 |
| KR102061850B1 (ko) * | 2018-02-26 | 2020-01-02 | 삼성전자주식회사 | 팬-아웃 반도체 패키지 |
| US11171115B2 (en) | 2019-03-18 | 2021-11-09 | Kepler Computing Inc. | Artificial intelligence processor with three-dimensional stacked memory |
| US11836102B1 (en) | 2019-03-20 | 2023-12-05 | Kepler Computing Inc. | Low latency and high bandwidth artificial intelligence processor |
| KR102436025B1 (ko) * | 2019-04-10 | 2022-08-25 | 주식회사 네패스 | 안테나를 포함하는 반도체 패키지 |
| US12086410B1 (en) | 2019-05-31 | 2024-09-10 | Kepler Computing Inc. | Ferroelectric memory chiplet in a multi-dimensional packaging with I/O switch embedded in a substrate or interposer |
| US11043472B1 (en) | 2019-05-31 | 2021-06-22 | Kepler Compute Inc. | 3D integrated ultra high-bandwidth memory |
| US11844223B1 (en) | 2019-05-31 | 2023-12-12 | Kepler Computing Inc. | Ferroelectric memory chiplet as unified memory in a multi-dimensional packaging |
| US11791233B1 (en) | 2021-08-06 | 2023-10-17 | Kepler Computing Inc. | Ferroelectric or paraelectric memory and logic chiplet with thermal management in a multi-dimensional packaging |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4157829B2 (ja) * | 2003-06-03 | 2008-10-01 | カシオ計算機株式会社 | 半導体装置およびその製造方法 |
-
2005
- 2005-11-30 JP JP2005345410A patent/JP5016811B2/ja not_active Expired - Fee Related
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