JP2006525622A5 - - Google Patents

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Publication number
JP2006525622A5
JP2006525622A5 JP2006513084A JP2006513084A JP2006525622A5 JP 2006525622 A5 JP2006525622 A5 JP 2006525622A5 JP 2006513084 A JP2006513084 A JP 2006513084A JP 2006513084 A JP2006513084 A JP 2006513084A JP 2006525622 A5 JP2006525622 A5 JP 2006525622A5
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JP
Japan
Prior art keywords
source
memory
programming pulse
memory cell
memory cells
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2006513084A
Other languages
English (en)
Japanese (ja)
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JP2006525622A (ja
JP4658039B2 (ja
Filing date
Publication date
Priority claimed from US10/426,282 external-priority patent/US6909638B2/en
Application filed filed Critical
Publication of JP2006525622A publication Critical patent/JP2006525622A/ja
Publication of JP2006525622A5 publication Critical patent/JP2006525622A5/ja
Application granted granted Critical
Publication of JP4658039B2 publication Critical patent/JP4658039B2/ja
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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JP2006513084A 2003-04-30 2004-04-16 Ｈｃｉプログラミングのためにソース電極上にバイアスを有する不揮発性メモリ Expired - Fee Related JP4658039B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US10/426,282 US6909638B2 (en) 2003-04-30 2003-04-30 Non-volatile memory having a bias on the source electrode for HCI programming
PCT/US2004/011870 WO2004100216A2 (en) 2003-04-30 2004-04-16 A non-volatile memory having a bias on the source electrode for hci programming

Publications (3)

Publication Number Publication Date
JP2006525622A JP2006525622A (ja) 2006-11-09
JP2006525622A5 true JP2006525622A5 (enExample) 2007-06-07
JP4658039B2 JP4658039B2 (ja) 2011-03-23

Family

ID=33309831

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006513084A Expired - Fee Related JP4658039B2 (ja) 2003-04-30 2004-04-16 Ｈｃｉプログラミングのためにソース電極上にバイアスを有する不揮発性メモリ

Country Status (9)

Country Link
US (1) US6909638B2 (enExample)
EP (1) EP1623431B1 (enExample)
JP (1) JP4658039B2 (enExample)
KR (1) KR101060034B1 (enExample)
CN (1) CN1781157B (enExample)
AT (1) ATE446577T1 (enExample)
DE (1) DE602004023714D1 (enExample)
TW (1) TW200506939A (enExample)
WO (1) WO2004100216A2 (enExample)

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7695843B2 (en) * 2004-02-13 2010-04-13 Microcell Corporation Microfibrous fuel cell assemblies comprising fiber-supported electrocatalyst layers, and methods of making same
US7227783B2 (en) 2005-04-28 2007-06-05 Freescale Semiconductor, Inc. Memory structure and method of programming
US7428172B2 (en) * 2006-07-17 2008-09-23 Freescale Semiconductor, Inc. Concurrent programming and program verification of floating gate transistor
US7583554B2 (en) 2007-03-02 2009-09-01 Freescale Semiconductor, Inc. Integrated circuit fuse array
US7787323B2 (en) * 2007-04-27 2010-08-31 Freescale Semiconductor, Inc. Level detect circuit
KR100965076B1 (ko) * 2008-11-14 2010-06-21 주식회사 하이닉스반도체 불휘발성 메모리 장치의 프로그램 방법
US7764550B2 (en) * 2008-11-25 2010-07-27 Freescale Semiconductor, Inc. Method of programming a non-volatile memory
US9312002B2 (en) 2014-04-04 2016-04-12 Sandisk Technologies Inc. Methods for programming ReRAM devices

Family Cites Families (13)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS57150193A (en) * 1981-03-13 1982-09-16 Toshiba Corp Non-volatile semiconductor memory device
US4888735A (en) * 1987-12-30 1989-12-19 Elite Semiconductor & Systems Int'l., Inc. ROM cell and array configuration
US5218571A (en) * 1990-05-07 1993-06-08 Cypress Semiconductor Corporation EPROM source bias circuit with compensation for processing characteristics
US5923585A (en) * 1997-01-10 1999-07-13 Invox Technology Source biasing in non-volatile memory having row-based sectors
US5798966A (en) * 1997-03-31 1998-08-25 Intel Corporation Flash memory VDS compensation techiques to reduce programming variability
JP3920415B2 (ja) * 1997-03-31 2007-05-30 三洋電機株式会社 不揮発性半導体メモリ装置
US6046932A (en) 1999-08-13 2000-04-04 Advanced Micro Devices, Inc. Circuit implementation to quench bit line leakage current in programming and over-erase correction modes in flash EEPROM
US6275415B1 (en) 1999-10-12 2001-08-14 Advanced Micro Devices, Inc. Multiple byte channel hot electron programming using ramped gate and source bias voltage
IT1308855B1 (it) * 1999-10-29 2002-01-11 St Microelectronics Srl Metodo di riprogrammazione controllata per celle di memoria nonvolatile,in particolare di tipo flash eeprom ed eprom.
JP2001195890A (ja) * 2000-01-12 2001-07-19 Sharp Corp 不揮発性半導体メモリ装置の書込み方式および書込み回路
JP4559606B2 (ja) * 2000-09-28 2010-10-13 ルネサスエレクトロニクス株式会社 不揮発性半導体記憶装置
JP2003123493A (ja) * 2001-10-12 2003-04-25 Fujitsu Ltd ソース電位を制御してプログラム動作を最適化した不揮発性メモリ
JP3908957B2 (ja) * 2002-01-24 2007-04-25 シャープ株式会社 不揮発性半導体メモリ装置

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