JP2006210480A - 電子回路基板 - Google Patents

電子回路基板 Download PDF

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Publication number
JP2006210480A
JP2006210480A JP2005018006A JP2005018006A JP2006210480A JP 2006210480 A JP2006210480 A JP 2006210480A JP 2005018006 A JP2005018006 A JP 2005018006A JP 2005018006 A JP2005018006 A JP 2005018006A JP 2006210480 A JP2006210480 A JP 2006210480A
Authority
JP
Japan
Prior art keywords
electrode terminals
frequency device
substrate
electrode terminal
solder
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2005018006A
Other languages
English (en)
Japanese (ja)
Other versions
JP2006210480A5 (enExample
Inventor
Tatsuya Miya
龍也 宮
Kazuharu Kimura
和治 木村
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Electronics Corp
Original Assignee
NEC Electronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Electronics Corp filed Critical NEC Electronics Corp
Priority to JP2005018006A priority Critical patent/JP2006210480A/ja
Priority to US11/322,306 priority patent/US7365274B2/en
Priority to KR1020060003201A priority patent/KR100722481B1/ko
Publication of JP2006210480A publication Critical patent/JP2006210480A/ja
Publication of JP2006210480A5 publication Critical patent/JP2006210480A5/ja
Withdrawn legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/111Pads for surface mounting, e.g. lay-out
    • AHUMAN NECESSITIES
    • A47FURNITURE; DOMESTIC ARTICLES OR APPLIANCES; COFFEE MILLS; SPICE MILLS; SUCTION CLEANERS IN GENERAL
    • A47JKITCHEN EQUIPMENT; COFFEE MILLS; SPICE MILLS; APPARATUS FOR MAKING BEVERAGES
    • A47J36/00Parts, details or accessories of cooking-vessels
    • A47J36/06Lids or covers for cooking-vessels
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components
    • H05K3/3442Leadless components having edge contacts, e.g. leadless chip capacitors, chip carriers
    • AHUMAN NECESSITIES
    • A47FURNITURE; DOMESTIC ARTICLES OR APPLIANCES; COFFEE MILLS; SPICE MILLS; SUCTION CLEANERS IN GENERAL
    • A47GHOUSEHOLD OR TABLE EQUIPMENT
    • A47G1/00Mirrors; Picture frames or the like, e.g. provided with heating, lighting or ventilating means
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/44Structure, shape, material or disposition of the wire connectors prior to the connecting process
    • H01L2224/45Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
    • H01L2224/45001Core members of the connector
    • H01L2224/45099Material
    • H01L2224/451Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
    • H01L2224/45138Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
    • H01L2224/45144Gold (Au) as principal constituent
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/0213Electrical arrangements not otherwise provided for
    • H05K1/0237High frequency adaptations
    • H05K1/0243Printed circuits associated with mounted high frequency components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/09654Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
    • H05K2201/0969Apertured conductors
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10636Leadless chip, e.g. chip capacitor or resistor
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10727Leadless chip carrier [LCC], e.g. chip-modules for cards
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10954Other details of electrical connections
    • H05K2201/10969Metallic case or integral heatsink of component electrically connected to a pad on PCB
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Food Science & Technology (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Structure Of Printed Boards (AREA)
JP2005018006A 2005-01-26 2005-01-26 電子回路基板 Withdrawn JP2006210480A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2005018006A JP2006210480A (ja) 2005-01-26 2005-01-26 電子回路基板
US11/322,306 US7365274B2 (en) 2005-01-26 2006-01-03 Electronic circuit board
KR1020060003201A KR100722481B1 (ko) 2005-01-26 2006-01-11 전자회로기판

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2005018006A JP2006210480A (ja) 2005-01-26 2005-01-26 電子回路基板

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2010060295A Division JP2010171441A (ja) 2010-03-17 2010-03-17 電子回路基板

Publications (2)

Publication Number Publication Date
JP2006210480A true JP2006210480A (ja) 2006-08-10
JP2006210480A5 JP2006210480A5 (enExample) 2008-01-17

Family

ID=36695510

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2005018006A Withdrawn JP2006210480A (ja) 2005-01-26 2005-01-26 電子回路基板

Country Status (3)

Country Link
US (1) US7365274B2 (enExample)
JP (1) JP2006210480A (enExample)
KR (1) KR100722481B1 (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011009683A (ja) * 2009-05-22 2011-01-13 Nippon Chemicon Corp コンデンサ
JP2022146698A (ja) * 2021-03-22 2022-10-05 株式会社東芝 半導体装置

Families Citing this family (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7709744B2 (en) * 2007-03-30 2010-05-04 Intel Corporation Gas venting component mounting pad
JP2009016397A (ja) * 2007-06-29 2009-01-22 Toshiba Corp プリント配線板
US7928635B2 (en) * 2008-01-07 2011-04-19 Epson Toyocom Corporation Package for electronic component and piezoelectric resonator
US20130016494A1 (en) * 2010-01-11 2013-01-17 Ingo Speier Package for light emitting and receiving devices
KR101209981B1 (ko) 2010-11-19 2012-12-07 삼성에스디아이 주식회사 회로실장기판 및 이를 이용한 배터리 팩
JP2012119637A (ja) 2010-12-03 2012-06-21 Sumitomo Electric Device Innovations Inc 光半導体装置の製造方法
JP5447433B2 (ja) * 2011-05-13 2014-03-19 株式会社安川電機 電子機器および電子機器が設けられた電力変換装置
DE112012005984T5 (de) * 2012-03-05 2014-12-04 Mitsubishi Electric Corporation Halbleitervorrichtung

Family Cites Families (13)

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US5369880A (en) * 1993-05-06 1994-12-06 Motorola, Inc. Method for forming solder deposit on a substrate
US5759047A (en) * 1996-05-24 1998-06-02 International Business Machines Corporation Flexible circuitized interposer with apertured member and method for making same
US6362436B1 (en) * 1999-02-15 2002-03-26 Mitsubishi Gas Chemical Company, Inc. Printed wiring board for semiconductor plastic package
US6362435B1 (en) * 1999-12-20 2002-03-26 Delphi Technologies, Inc. Multi-layer conductor pad for reducing solder voiding
US6399896B1 (en) * 2000-03-15 2002-06-04 International Business Machines Corporation Circuit package having low modulus, conformal mounting pads
US6573610B1 (en) * 2000-06-02 2003-06-03 Siliconware Precision Industries Co., Ltd. Substrate of semiconductor package for flip chip package
JP3718131B2 (ja) * 2001-03-16 2005-11-16 松下電器産業株式会社 高周波モジュールおよびその製造方法
US6566611B2 (en) * 2001-09-26 2003-05-20 Intel Corporation Anti-tombstoning structures and methods of manufacture
JP2003110049A (ja) * 2001-09-28 2003-04-11 Fujitsu Ten Ltd 高周波icパッケージ、高周波icパッケージを使用する高周波ユニット及び、その製造方法
JP3753968B2 (ja) * 2001-10-11 2006-03-08 ヒタチグローバルストレージテクノロジーズネザーランドビーブイ 配線一体型サスペンション及びその製造方法
TW533555B (en) * 2001-11-21 2003-05-21 Siliconware Precision Industries Co Ltd Substrate for passive device
JP3850755B2 (ja) 2002-05-29 2006-11-29 シャープ株式会社 半導体装置およびその製造方法
JP2004047781A (ja) 2002-07-12 2004-02-12 Sanyo Electric Co Ltd 混成集積回路装置およびその製造方法

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011009683A (ja) * 2009-05-22 2011-01-13 Nippon Chemicon Corp コンデンサ
JP2022146698A (ja) * 2021-03-22 2022-10-05 株式会社東芝 半導体装置
JP7482072B2 (ja) 2021-03-22 2024-05-13 株式会社東芝 半導体装置

Also Published As

Publication number Publication date
US7365274B2 (en) 2008-04-29
US20060162958A1 (en) 2006-07-27
KR100722481B1 (ko) 2007-05-29
KR20060086848A (ko) 2006-08-01

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