JP2006100724A - 半導体装置の製造方法 - Google Patents
半導体装置の製造方法 Download PDFInfo
- Publication number
- JP2006100724A JP2006100724A JP2004287634A JP2004287634A JP2006100724A JP 2006100724 A JP2006100724 A JP 2006100724A JP 2004287634 A JP2004287634 A JP 2004287634A JP 2004287634 A JP2004287634 A JP 2004287634A JP 2006100724 A JP2006100724 A JP 2006100724A
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- Prior art keywords
- semiconductor device
- manufacturing
- insulating film
- sapphire
- film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
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- 238000004519 manufacturing process Methods 0.000 title claims description 31
- 239000004065 semiconductor Substances 0.000 title claims description 19
- 238000000034 method Methods 0.000 title claims description 18
- 239000000758 substrate Substances 0.000 claims abstract description 39
- 229910052594 sapphire Inorganic materials 0.000 claims abstract description 36
- 239000010980 sapphire Substances 0.000 claims abstract description 36
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims description 14
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 14
- 238000010438 heat treatment Methods 0.000 claims description 13
- 229910052581 Si3N4 Inorganic materials 0.000 claims description 12
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 claims description 11
- 238000005530 etching Methods 0.000 claims 1
- 230000001678 irradiating effect Effects 0.000 claims 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 abstract description 13
- 229910052782 aluminium Inorganic materials 0.000 abstract description 13
- 230000015572 biosynthetic process Effects 0.000 abstract description 3
- 238000007669 thermal treatment Methods 0.000 abstract 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 17
- 229910052710 silicon Inorganic materials 0.000 description 17
- 239000010703 silicon Substances 0.000 description 17
- 239000013078 crystal Substances 0.000 description 4
- 238000009792 diffusion process Methods 0.000 description 4
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 3
- 238000005516 engineering process Methods 0.000 description 3
- 238000010494 dissociation reaction Methods 0.000 description 2
- 230000005593 dissociations Effects 0.000 description 2
- 239000012535 impurity Substances 0.000 description 2
- 238000002844 melting Methods 0.000 description 2
- 230000008018 melting Effects 0.000 description 2
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical group O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 2
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 238000011109 contamination Methods 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 239000012212 insulator Substances 0.000 description 1
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 1
- QPJSUIGXIBEQAC-UHFFFAOYSA-N n-(2,4-dichloro-5-propan-2-yloxyphenyl)acetamide Chemical compound CC(C)OC1=CC(NC(C)=O)=C(Cl)C=C1Cl QPJSUIGXIBEQAC-UHFFFAOYSA-N 0.000 description 1
- 230000003071 parasitic effect Effects 0.000 description 1
- 238000000206 photolithography Methods 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/84—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
- H01L21/86—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body the insulating body being sapphire, e.g. silicon on sapphire structure, i.e. SOS
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1203—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/544—Marks applied to semiconductor devices or parts
- H01L2223/54406—Marks applied to semiconductor devices or parts comprising alphanumeric information
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/544—Marks applied to semiconductor devices or parts
- H01L2223/54493—Peripheral marks on wafers, e.g. orientation flats, notches, lot number
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Thin Film Transistor (AREA)
Abstract
【解決手段】 サファイア層を用いたSOS基板上の一部に、レーザを照射をおこない識別マークを形成する。レーザ照射時に露出した基板表面のサファイア層を、700℃以下の熱処理による絶縁膜で覆い、その後は700℃より高い熱処理を用いて素子形成を行なう。
【選択図】 図3
Description
2 シリコン窒化膜
3 ウエハ識別マーク
4 シリコン層
5 サファイア層
6 シリコン酸化膜
7 開口部
Claims (13)
- サファイア層を用いたSOS基板上にレーザにより該サファイア層に到達する溝を形成する工程と、前記溝を覆う絶縁膜を700℃以下の温度により形成する工程と、その後700℃より高い熱処理を施す工程とを備えたことを特徴とする半導体装置の形成方法。
- 前記溝は識別マークであることを特徴とする請求項1記載の半導体装置の製造方法。
- 前記絶縁膜はCVDシリコン酸化膜であることを特徴とする請求項2記載の半導体装置の製造方法。
- 前記絶縁膜はCVDシリコン窒化膜であることを特徴とする請求項2記載の半導体装置の製造方法。
- 前記絶縁膜は積層膜であることを特徴とする請求項2記載の半導体装置の製造方法。
- サファイア層を用いたSOS基板上の一部にレーザを照射し該サファイア層の表面を損傷させる工程と、前記サファイア層の表面を700℃以下の熱処理により絶縁膜を形成する工程と、その後700℃より高い熱処理を施す工程とを備えたことを特徴とする半導体装置の形成方法。
- 前記絶縁膜はCVDシリコン酸化膜であることを特徴とする請求項6記載の半導体装置の製造方法。
- 前記絶縁膜はCVDシリコン窒化膜であることを特徴とする請求項6記載の半導体装置の製造方法。
- 前記絶縁膜は積層膜であることを特徴とする請求項6記載の半導体装置の製造方法。
- サファイア層を用いたSOS基板上の一部をエッチングし該サファイア層の表面を露出させる工程と、前記サファイア層の表面を700℃以下の熱処理により絶縁膜を形成する工程と、その後700℃より高い熱処理を施す工程とを備えたことを特徴とする半導体装置の形成方法。
- 前記絶縁膜はCVDシリコン酸化膜であることを特徴とする請求項10記載の半導体装置の製造方法。
- 前記絶縁膜はCVDシリコン窒化膜であることを特徴とする請求項10記載の半導体装置の製造方法。
- 前記絶縁膜は積層膜であることを特徴とする請求項10記載の半導体装置の製造方法。
Priority Applications (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004287634A JP4902953B2 (ja) | 2004-09-30 | 2004-09-30 | 半導体装置の製造方法 |
US11/118,361 US7390702B2 (en) | 2004-09-30 | 2005-05-02 | Method for manufacturing semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2004287634A JP4902953B2 (ja) | 2004-09-30 | 2004-09-30 | 半導体装置の製造方法 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2006100724A true JP2006100724A (ja) | 2006-04-13 |
JP4902953B2 JP4902953B2 (ja) | 2012-03-21 |
Family
ID=36099744
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2004287634A Expired - Fee Related JP4902953B2 (ja) | 2004-09-30 | 2004-09-30 | 半導体装置の製造方法 |
Country Status (2)
Country | Link |
---|---|
US (1) | US7390702B2 (ja) |
JP (1) | JP4902953B2 (ja) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8361877B2 (en) | 2010-01-06 | 2013-01-29 | Oki Semiconductor Co., Ltd. | Manufacturing method of semiconductor device, semiconductor device, and method of printing on semiconductor wafer |
Families Citing this family (8)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US10052848B2 (en) | 2012-03-06 | 2018-08-21 | Apple Inc. | Sapphire laminates |
US9221289B2 (en) | 2012-07-27 | 2015-12-29 | Apple Inc. | Sapphire window |
US9232672B2 (en) | 2013-01-10 | 2016-01-05 | Apple Inc. | Ceramic insert control mechanism |
US9632537B2 (en) | 2013-09-23 | 2017-04-25 | Apple Inc. | Electronic component embedded in ceramic material |
US9678540B2 (en) | 2013-09-23 | 2017-06-13 | Apple Inc. | Electronic component embedded in ceramic material |
US9154678B2 (en) | 2013-12-11 | 2015-10-06 | Apple Inc. | Cover glass arrangement for an electronic device |
US9225056B2 (en) | 2014-02-12 | 2015-12-29 | Apple Inc. | Antenna on sapphire structure |
US10406634B2 (en) | 2015-07-01 | 2019-09-10 | Apple Inc. | Enhancing strength in laser cutting of ceramic components |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5350672A (en) * | 1976-10-19 | 1978-05-09 | Mitsubishi Electric Corp | Production of substrate for semiconductor device |
WO2001003191A1 (fr) * | 1999-07-02 | 2001-01-11 | Mitsubishi Materials Silicon Corporation | Substrat soi, procede de fabrication de celui-ci et dispositif de semi-conducteur utilisant le substrat soi |
JP2001102379A (ja) * | 1999-09-28 | 2001-04-13 | Asahi Kasei Microsystems Kk | 半導体装置形成用基板に対する保護膜形成方法 |
JP2001298169A (ja) * | 2000-04-13 | 2001-10-26 | Seiko Epson Corp | 半導体装置とその製造方法 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP3173106B2 (ja) | 1992-02-20 | 2001-06-04 | ソニー株式会社 | エピタキシャルウエハの形成方法 |
JPH0837137A (ja) | 1994-05-16 | 1996-02-06 | Sony Corp | Soi構造の半導体基板管理方法、識別マーク印字装置および識別マーク読取装置 |
US6185308B1 (en) * | 1997-07-07 | 2001-02-06 | Fujitsu Limited | Key recovery system |
JP4491851B2 (ja) | 1999-04-06 | 2010-06-30 | ソニー株式会社 | 表面に識別パターンを有する多層基板の製造方法 |
US6348991B1 (en) * | 1999-10-29 | 2002-02-19 | Intel Corporation | Integrated circuit with opposed spatial light modulator and processor |
US20010038153A1 (en) | 2000-01-07 | 2001-11-08 | Kiyofumi Sakaguchi | Semiconductor substrate and process for its production |
JP2001257139A (ja) | 2000-01-07 | 2001-09-21 | Canon Inc | 半導体基板とその作製方法 |
US6815308B2 (en) * | 2002-08-15 | 2004-11-09 | Micron Technology, Inc. | Use of a dual-tone resist to form photomasks including alignment mark protection, intermediate semiconductor device structures and bulk semiconductor device substrates |
TWI231606B (en) * | 2003-11-10 | 2005-04-21 | Shih-Hsien Tseng | Image pickup device and a manufacturing method thereof |
US7129114B2 (en) * | 2004-03-10 | 2006-10-31 | Micron Technology, Inc. | Methods relating to singulating semiconductor wafers and wafer scale assemblies |
US7419852B2 (en) * | 2004-08-27 | 2008-09-02 | Micron Technology, Inc. | Low temperature methods of forming back side redistribution layers in association with through wafer interconnects, semiconductor devices including same, and assemblies |
-
2004
- 2004-09-30 JP JP2004287634A patent/JP4902953B2/ja not_active Expired - Fee Related
-
2005
- 2005-05-02 US US11/118,361 patent/US7390702B2/en not_active Expired - Fee Related
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5350672A (en) * | 1976-10-19 | 1978-05-09 | Mitsubishi Electric Corp | Production of substrate for semiconductor device |
WO2001003191A1 (fr) * | 1999-07-02 | 2001-01-11 | Mitsubishi Materials Silicon Corporation | Substrat soi, procede de fabrication de celui-ci et dispositif de semi-conducteur utilisant le substrat soi |
JP2001102379A (ja) * | 1999-09-28 | 2001-04-13 | Asahi Kasei Microsystems Kk | 半導体装置形成用基板に対する保護膜形成方法 |
JP2001298169A (ja) * | 2000-04-13 | 2001-10-26 | Seiko Epson Corp | 半導体装置とその製造方法 |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US8361877B2 (en) | 2010-01-06 | 2013-01-29 | Oki Semiconductor Co., Ltd. | Manufacturing method of semiconductor device, semiconductor device, and method of printing on semiconductor wafer |
Also Published As
Publication number | Publication date |
---|---|
JP4902953B2 (ja) | 2012-03-21 |
US7390702B2 (en) | 2008-06-24 |
US20060068534A1 (en) | 2006-03-30 |
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