JP2005311214A - 半導体装置およびその製造方法 - Google Patents
半導体装置およびその製造方法 Download PDFInfo
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- JP2005311214A JP2005311214A JP2004129254A JP2004129254A JP2005311214A JP 2005311214 A JP2005311214 A JP 2005311214A JP 2004129254 A JP2004129254 A JP 2004129254A JP 2004129254 A JP2004129254 A JP 2004129254A JP 2005311214 A JP2005311214 A JP 2005311214A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45117—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 400°C and less than 950°C
- H01L2224/45124—Aluminium (Al) as principal constituent
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48135—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
- H01L2224/48137—Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being arranged next to each other, e.g. on a common substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/91—Methods for connecting semiconductor or solid state bodies including different methods provided for in two or more of groups H01L2224/80 - H01L2224/90
- H01L2224/92—Specific sequence of method steps
- H01L2224/922—Connecting different surfaces of the semiconductor or solid-state body with connectors of different types
- H01L2224/9222—Sequential connecting processes
- H01L2224/92242—Sequential connecting processes the first connecting process involving a layer connector
- H01L2224/92247—Sequential connecting processes the first connecting process involving a layer connector the second connecting process involving a wire connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
- H01L2924/1305—Bipolar Junction Transistor [BJT]
- H01L2924/13055—Insulated gate bipolar transistor [IGBT]
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Abstract
【解決手段】チップが樹脂でモールドされた半導体装置が、表面と裏面を備え、リード部1c、ダイパッド部1a、及びリード部1cとダイパッド部1aとを接続する接続部1bとを含むフレーム1と、ダイパッド部1aの表面に載置されたパワーチップ5と、対向する第1面と第2面とを備え、ダイパッド部1aの裏面がその第1面と接するように配置された絶縁体3と、絶縁体3の第1面上に、パワーチップを封止するように設けられたモールド樹脂2とを含む。モールド樹脂に封止された接続部1bは孔部を有する。
【選択図】図3
Description
図1は、全体が100で表される、本実施の形態1にかかる半導体装置の斜視図である。また、図2は、図1の半導体装置100の裏面図、図3は、図1の半導体装置100をI−I方向に見た断面図である。
なお、パワーチップ5やICチップ7は、半導体装置100の機能に応じて複数個設けても構わない。
なお、ダメージが発生しにくい場合は、金属箔4を設けない構造を採用してもよい。この場合、モールド樹脂2の裏面からは、樹脂シート3が露出することとなる。
図4に示すように、半導体装置100では、フレーム1の接続部1bに孔部1dが設けられている。
なお、半硬化状態の樹脂とは、常温では固体であるが、高温では一旦溶融した後に完全硬化に向かう、硬化が未完全状態な熱硬化樹脂をいう。
図10は、全体が200で表される、本実施の形態2にかかる半導体装置の断面図である。図10は、図1に示すI−I方向と同じ方向に見た断面図であり、図10中、図3と同一符号は同一又は相当箇所を示す
図11は、全体が300で表される、本実施の形態3にかかる半導体装置の断面図である。図11は、図1に示すI−I方向と同じ方向に見た断面図であり、図11中、図3と同一符号は同一又は相当箇所を示す。
図12は、全体が400で表される、本実施の形態4にかかる半導体装置の断面図である。図12は、図1に示すI−I方向と同じ方向に見た断面図であり、図12中、図3と同一符号は同一又は相当箇所を示す。
Claims (9)
- チップが樹脂でモールドされた半導体装置であって、
表面と裏面を備え、リード部、ダイパッド部、及び該リード部と該ダイパッド部とを接続する接続部とを含むフレームと、
該ダイパッドの該表面に載置されたパワーチップと、
対向する第1面と第2面とを備え、該ダイパッド部の該裏面がその第1面と接するように配置された絶縁体と、
該絶縁体の該第1面上に、該パワーチップを封止するように設けられたモールド樹脂とを含み、
該モールド樹脂に封止された該接続部が孔部を有することを特徴とする半導体装置。 - 上記リード部と上記ダイパッド部が段差を持つように上記接続部を介して接続されたことを特徴とする請求項1に記載の半導体装置。
- 上記孔部が、上記接続部から、上記リード部及び上記ダイパッド部まで延びて設けられたことを特徴とする請求項2に記載の半導体装置。
- 上記リード部、上記ダイパッド部、及び上記接続部が、略同一平面にあることを特徴とする請求項1に記載の半導体装置。
- 上記孔部から上記接続部の端部までの距離が、該接続部の板厚より大きいことを特徴とする請求項1〜4のいずれかに記載の半導体装置。
- 上記孔部が略矩形形状であることを特徴とする請求項1〜5のいずれかに記載の半導体装置。
- 上記絶縁体が、樹脂シート、セラミック、及び裏面に金属板を設けたセラミックからなる群から選択される一の絶縁体からなることを特徴とする請求項1〜6のいずれかに記載の半導体装置。
- チップを樹脂モールドした半導体装置の製造方法であって、
表面と裏面を備え、孔部を有する接続部を介してリード部とダイパッド部が接続されたフレームを準備する工程と、
第1面と第2面を有する絶縁体を準備する工程と、
該ダイパッド部の該表面上にパワーチップを載置する工程と、
該ダイパッド部の該裏面が該絶縁体の該第1面に接するように、該絶縁体の該第1面上に該フレームを配置する工程と、
該パワーチップを埋め込むように、該接続部の方向から該ダイパッド部上に封止用樹脂を充填する工程とを含むことを特徴とする半導体装置の製造方法。 - 上記リード部と上記ダイパッド部が、段差を持つように上記接続部を介して接続され、上記封止用樹脂が、該孔部を通って上記ダイパッド部上に充填されることを特徴とする請求項8に記載の製造方法。
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Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2010086993A (ja) * | 2008-09-29 | 2010-04-15 | Sanyo Electric Co Ltd | 樹脂シートおよびそれを用いた回路装置の製造方法 |
JP2014090137A (ja) * | 2012-10-31 | 2014-05-15 | Sanken Electric Co Ltd | 半導体装置の製造方法および半導体装置 |
KR20140121204A (ko) * | 2013-04-05 | 2014-10-15 | 페어차일드코리아반도체 주식회사 | 파워 모듈 및 그 제조 방법 |
CN108493181A (zh) * | 2018-05-17 | 2018-09-04 | 深圳赛意法微电子有限公司 | 引线框架和半导体封装器件 |
CN112701093A (zh) * | 2019-10-23 | 2021-04-23 | 三菱电机株式会社 | 半导体模块及电力转换装置 |
JPWO2022079759A1 (ja) * | 2020-10-12 | 2022-04-21 | ||
WO2022138200A1 (ja) * | 2020-12-23 | 2022-06-30 | 三菱電機株式会社 | パワー半導体装置およびその製造方法ならびに電力変換装置 |
Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
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JPS62138455U (ja) * | 1986-02-21 | 1987-09-01 | ||
JPS62219649A (ja) * | 1986-03-20 | 1987-09-26 | Hitachi Ltd | 電子装置 |
JPH0328753U (ja) * | 1989-07-28 | 1991-03-22 | ||
JPH0837268A (ja) * | 1994-07-22 | 1996-02-06 | Sony Corp | リードフレーム |
JPH09172126A (ja) * | 1995-12-18 | 1997-06-30 | Matsushita Electron Corp | 樹脂封止型半導体装置およびその製造方法 |
JPH11260975A (ja) * | 1998-03-09 | 1999-09-24 | Hitachi Ltd | 半導体装置およびその製造方法 |
JP2003124436A (ja) * | 2001-10-19 | 2003-04-25 | Hitachi Ltd | 半導体装置 |
JP2003197664A (ja) * | 2001-12-28 | 2003-07-11 | Seiko Epson Corp | 半導体装置及びその製造方法、回路基板並びに電子機器 |
JP2004087883A (ja) * | 2002-08-28 | 2004-03-18 | Sanyo Electric Co Ltd | リードフレームおよびそれを用いた半導体装置の製造方法 |
-
2004
- 2004-04-26 JP JP2004129254A patent/JP4515810B2/ja not_active Expired - Lifetime
Patent Citations (9)
Publication number | Priority date | Publication date | Assignee | Title |
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JPS62138455U (ja) * | 1986-02-21 | 1987-09-01 | ||
JPS62219649A (ja) * | 1986-03-20 | 1987-09-26 | Hitachi Ltd | 電子装置 |
JPH0328753U (ja) * | 1989-07-28 | 1991-03-22 | ||
JPH0837268A (ja) * | 1994-07-22 | 1996-02-06 | Sony Corp | リードフレーム |
JPH09172126A (ja) * | 1995-12-18 | 1997-06-30 | Matsushita Electron Corp | 樹脂封止型半導体装置およびその製造方法 |
JPH11260975A (ja) * | 1998-03-09 | 1999-09-24 | Hitachi Ltd | 半導体装置およびその製造方法 |
JP2003124436A (ja) * | 2001-10-19 | 2003-04-25 | Hitachi Ltd | 半導体装置 |
JP2003197664A (ja) * | 2001-12-28 | 2003-07-11 | Seiko Epson Corp | 半導体装置及びその製造方法、回路基板並びに電子機器 |
JP2004087883A (ja) * | 2002-08-28 | 2004-03-18 | Sanyo Electric Co Ltd | リードフレームおよびそれを用いた半導体装置の製造方法 |
Cited By (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2010086993A (ja) * | 2008-09-29 | 2010-04-15 | Sanyo Electric Co Ltd | 樹脂シートおよびそれを用いた回路装置の製造方法 |
JP2014090137A (ja) * | 2012-10-31 | 2014-05-15 | Sanken Electric Co Ltd | 半導体装置の製造方法および半導体装置 |
KR20140121204A (ko) * | 2013-04-05 | 2014-10-15 | 페어차일드코리아반도체 주식회사 | 파워 모듈 및 그 제조 방법 |
KR102167858B1 (ko) * | 2013-04-05 | 2020-10-20 | 온세미컨덕터코리아 주식회사 | 파워 모듈 및 그 제조 방법 |
CN108493181A (zh) * | 2018-05-17 | 2018-09-04 | 深圳赛意法微电子有限公司 | 引线框架和半导体封装器件 |
CN112701093A (zh) * | 2019-10-23 | 2021-04-23 | 三菱电机株式会社 | 半导体模块及电力转换装置 |
JPWO2022079759A1 (ja) * | 2020-10-12 | 2022-04-21 | ||
JP7395010B2 (ja) | 2020-10-12 | 2023-12-08 | 三菱電機株式会社 | 半導体モジュール |
WO2022138200A1 (ja) * | 2020-12-23 | 2022-06-30 | 三菱電機株式会社 | パワー半導体装置およびその製造方法ならびに電力変換装置 |
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