JP2004111029A - 半導体集積回路およびメモリのテスト方法 - Google Patents

半導体集積回路およびメモリのテスト方法 Download PDF

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Publication number
JP2004111029A
JP2004111029A JP2003301117A JP2003301117A JP2004111029A JP 2004111029 A JP2004111029 A JP 2004111029A JP 2003301117 A JP2003301117 A JP 2003301117A JP 2003301117 A JP2003301117 A JP 2003301117A JP 2004111029 A JP2004111029 A JP 2004111029A
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JP
Japan
Prior art keywords
clock
test data
test
data
memory
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Pending
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JP2003301117A
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English (en)
Japanese (ja)
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JP2004111029A5 (enExample
Inventor
Osamu Ichikawa
修 市川
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Panasonic Holdings Corp
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Matsushita Electric Industrial Co Ltd
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Priority to JP2003301117A priority Critical patent/JP2004111029A/ja
Publication of JP2004111029A publication Critical patent/JP2004111029A/ja
Publication of JP2004111029A5 publication Critical patent/JP2004111029A5/ja
Pending legal-status Critical Current

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  • For Increasing The Reliability Of Semiconductor Memories (AREA)
  • Tests Of Electronic Circuits (AREA)
JP2003301117A 2002-08-30 2003-08-26 半導体集積回路およびメモリのテスト方法 Pending JP2004111029A (ja)

Priority Applications (1)

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JP2003301117A JP2004111029A (ja) 2002-08-30 2003-08-26 半導体集積回路およびメモリのテスト方法

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JP2002254181 2002-08-30
JP2003301117A JP2004111029A (ja) 2002-08-30 2003-08-26 半導体集積回路およびメモリのテスト方法

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JP2004111029A true JP2004111029A (ja) 2004-04-08
JP2004111029A5 JP2004111029A5 (enExample) 2006-04-06

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JP2003301117A Pending JP2004111029A (ja) 2002-08-30 2003-08-26 半導体集積回路およびメモリのテスト方法

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100768549B1 (ko) 2006-07-27 2007-10-18 연세대학교 산학협력단 분할된 ｌｆｓｒ을 이용한 저전력 결정패턴 ｂｉｓｔ 방법및 장치
JP2011501343A (ja) * 2007-10-24 2011-01-06 インターナショナル・トレーディング・アンド・テクノロジー・カンパニー・リミテッド 半導体テストパターン信号の逓倍装置

Citations (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6283678A (ja) * 1985-10-09 1987-04-17 Hitachi Ltd 試験パタ−ン発生器
JPS6469973A (en) * 1987-09-11 1989-03-15 Hitachi Ltd Testing apparatus of lsi
JPH02202640A (ja) * 1989-02-01 1990-08-10 Seiko Epson Corp パターン発生装置
JPH0330879U (enExample) * 1989-08-02 1991-03-26
JPH04190176A (ja) * 1990-11-22 1992-07-08 Ando Electric Co Ltd 試験パターン発生器
JPH06167546A (ja) * 1992-11-30 1994-06-14 Ando Electric Co Ltd メモリデバイス検査用データ転送回路
JPH10125095A (ja) * 1996-10-18 1998-05-15 Advantest Corp 半導体メモリ試験装置
JPH11328995A (ja) * 1998-05-19 1999-11-30 Advantest Corp メモリ試験装置
JP2000123597A (ja) * 1998-10-21 2000-04-28 Advantest Corp 半導体試験装置
JP2000162289A (ja) * 1998-11-30 2000-06-16 Ando Electric Co Ltd パタン選択装置
JP2001006400A (ja) * 1999-06-18 2001-01-12 Fujitsu Ltd メモリデバイス
JP2001110200A (ja) * 1999-10-08 2001-04-20 Hitachi Ltd Ｒａｍの診断方法及びｌｓｉ
JP2001243800A (ja) * 2000-02-29 2001-09-07 Mitsubishi Electric Corp 半導体集積回路装置
JP2003043117A (ja) * 2001-08-02 2003-02-13 Fujitsu Ltd 半導体集積回路
JP2004030775A (ja) * 2002-06-25 2004-01-29 Advantest Corp 半導体メモリ試験装置
JP2004361098A (ja) * 2003-06-02 2004-12-24 Matsushita Electric Ind Co Ltd 半導体集積回路、及び半導体集積回路装置
JP2005174428A (ja) * 2003-12-10 2005-06-30 Fujitsu Ltd メモリ試験方法

Patent Citations (17)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6283678A (ja) * 1985-10-09 1987-04-17 Hitachi Ltd 試験パタ−ン発生器
JPS6469973A (en) * 1987-09-11 1989-03-15 Hitachi Ltd Testing apparatus of lsi
JPH02202640A (ja) * 1989-02-01 1990-08-10 Seiko Epson Corp パターン発生装置
JPH0330879U (enExample) * 1989-08-02 1991-03-26
JPH04190176A (ja) * 1990-11-22 1992-07-08 Ando Electric Co Ltd 試験パターン発生器
JPH06167546A (ja) * 1992-11-30 1994-06-14 Ando Electric Co Ltd メモリデバイス検査用データ転送回路
JPH10125095A (ja) * 1996-10-18 1998-05-15 Advantest Corp 半導体メモリ試験装置
JPH11328995A (ja) * 1998-05-19 1999-11-30 Advantest Corp メモリ試験装置
JP2000123597A (ja) * 1998-10-21 2000-04-28 Advantest Corp 半導体試験装置
JP2000162289A (ja) * 1998-11-30 2000-06-16 Ando Electric Co Ltd パタン選択装置
JP2001006400A (ja) * 1999-06-18 2001-01-12 Fujitsu Ltd メモリデバイス
JP2001110200A (ja) * 1999-10-08 2001-04-20 Hitachi Ltd Ｒａｍの診断方法及びｌｓｉ
JP2001243800A (ja) * 2000-02-29 2001-09-07 Mitsubishi Electric Corp 半導体集積回路装置
JP2003043117A (ja) * 2001-08-02 2003-02-13 Fujitsu Ltd 半導体集積回路
JP2004030775A (ja) * 2002-06-25 2004-01-29 Advantest Corp 半導体メモリ試験装置
JP2004361098A (ja) * 2003-06-02 2004-12-24 Matsushita Electric Ind Co Ltd 半導体集積回路、及び半導体集積回路装置
JP2005174428A (ja) * 2003-12-10 2005-06-30 Fujitsu Ltd メモリ試験方法

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100768549B1 (ko) 2006-07-27 2007-10-18 연세대학교 산학협력단 분할된 ｌｆｓｒ을 이용한 저전력 결정패턴 ｂｉｓｔ 방법및 장치
JP2011501343A (ja) * 2007-10-24 2011-01-06 インターナショナル・トレーディング・アンド・テクノロジー・カンパニー・リミテッド 半導体テストパターン信号の逓倍装置

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